kicad-developers team mailing list archive

[Wayne Stambaugh <stambaughw@xxxxxxxxx>]

On 7/12/2018 10:50 AM, Rene Pöschl wrote:
> On 12/07/18 16:35, Wayne Stambaugh wrote:
>> I agree with you in principal but the practical side of these changes is
>> far more subtle as demonstrated by the simulation and erc issues.  The
>> invisible power pin issue has been around for as long as I can remember
>> (mid 80s).  Oddly enough, op-amps typically have power pins shown on all
>> units where logic gates hide the power pins on all units.  I'm not sure
>> about the logic (pun intended) behind this but it has been this way for
>> a long time.
> Not in the new v5 lib. There the power unit is separated for all symbols
> (unless we missed some)
> The reason is that as far as my research shows, one can connect multiple
> different nets to different power pins that way. I do not think this is
> a good solution.
> Having the power pins on the first unit creates problems if the user
> does not intent to use the first unit. (maybe the physical pin order
> does not fit the intended pcb layout)
> Having the power pins separate (and well designed) makes it possible to
> either have them on a separate sheet, overlay them with any other unit
> or place them near the other units. (It is the most flexible way to
> create such circuits)
> 
>> We will be able to fix this once the new symbol file format is
>> implemented.  The current symbol file format has no way to indicate
>> individual unit interchangeability so there is no way for the spice
>> netlist formatter to add the power pin unit to each interchangeable unit
>> so the spice model pin count matches the symbol pin count.  We have
>> effectively thrown spice users under the bus which I really don't like
>> doing.  In the short term, we can recommend that they use the old logic
>> and op-amp symbols.
> 
> My opinion is that if there is a conflict between simulation and pcb
> design needs, the later should get priority. (I assume pcb design is
> still the core feature of kicad.)

I agree.  That's why I'm not holding up the v5 release but we need to do
a better job of considering the implications when making changes.

> If i read the bug report correctly simulation is possible if all units
> are included in the schematic, so this is the correct way to go in my mind.

There needs to be the same number of connections in both the spice model
and the gate symbol.  The eeschema spice netlist formatter will does not
know how to combine gate and power units into a stand alone circuit that
matches the model.  The power pins have to be part of each gate symbol
in order for the netlist to be correct.

> 
>>
>> On 7/12/2018 10:04 AM, Rene Pöschl wrote:
>>> Sadly the old symbols are completely unusable in many modern circuits
>>> which use more then one power supply for different parts of the circuit.
>>> Hidden power pins are not the way to go! The fix for this bug must come
>>> from a different side then reintroducing hidden power pins.
>>>
>>> On 12/07/18 13:46, Wayne Stambaugh wrote:
>>>> Rene,
>>>>
>>>> Bug https://bugs.launchpad.net/kicad/+bug/1781290 may be an issue.  The
>>>> decision to separate symbol power pins as a separate symbol unit caused
>>>> this bug.  I didn't think about this when the changes to the symbol
>>>> libraries where made but it is going to cause issues for anyone trying
>>>> to create simulations.  I preferred the old symbols but it's not
>>>> something I feel strongly about but given that these changes caused
>>>> this
>>>> issue we may need to rethink this decision or provide alternative
>>>> symbols for spice simulation.
>>>>
>>>> Cheers,
>>>>
>>>> Wayne
>>>>
>>>> On 7/12/2018 5:36 AM, Rene Pöschl wrote:
>>>>> The libs should be ready to go. We might still fix some minor things
>>>>> till the release but we do not have any showstopper topics open.
>>>>>
>>>>> On 11/07/18 20:49, Wayne Stambaugh wrote:
>>>>>> Are there any critical bugs remaining to be fixed for the stable 5
>>>>>> release?  I didn't see any thing outstanding but I may have missed
>>>>>> something while I was on vacation.  I'm going to create a 5.0.0
>>>>>> milestone for the last few remaining bugs and shoot for a 7/20 tag
>>>>>> date
>>>>>> unless there are any more critical bugs lurking about.  I will also
>>>>>> create 5.0 and 5.1 branches.  If I tag on 7/20, I would like to make
>>>>>> the
>>>>>> release announcement on 7/27.  Does anyone see any issues with these
>>>>>> dates
>>>>>>
>>>>>> How do stand with our installers?  I saw the macos installer was
>>>>>> making
>>>>>> some nice progress.
>>>>>>
>>>>>> Are the doc devs, library devs, and translators (except for the
>>>>>> recent
>>>>>> minor string changes) ready?
>>>>>>
>>>>>> Is there anything else I'm missing?  I really would like to make
>>>>>> these
>>>>>> dates.  I have an Olimex TERES laptop kit that I've been dying to
>>>>>> play
>>>>>> around with but I know once I start on that, everything else will get
>>>>>> pushed to the back burner so I'm not going to start until version
>>>>>> 5 is
>>>>>> released. :)
>>>>>>
>>>>>> Cheers,
>>>>>>
>>>>>> Wayne
>>>>>>
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>>>>>
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>>>
>>>
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> 
> 
> 
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