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Re: Bug 1754130


Hey Mark,

On 1/11/2019 5:11 AM, mdoesbur@xxxxxxxxx wrote:
> Here's a patch to import the netclasses from eagle.

There are a few minor coding policy issues.  We now have clang
formatting available when you perform a git commit if you would prefer
not to have to remember KiCad's formatting.  You just have to enable it
in your git repo if that is your preference.

It looks like there is some left over debugging code (using std::cerr)
that needs to be removed.  If you want leave debugging support in your
code, please use wxLogTrace[1].

I looks like you are translating Eagle units directly to kicad's pcb
units.  Is this valid?  I don't know what internal units Eagle uses for
boards but KiCad uses 1nm.  If Eagle doesn't use 1nm, then your unit
conversions are wrong.

> As already mentioned, all nets without a label are in the default
> netclass. The clearances are ignored because I have no idea what clearance
> to use. The trackwidths are ignored, I've never used that and saw no
> reason to fix this since the patch isn't that usefull anyway.

Does Eagle specify a default net clearance?  If so, we should be using
that instead of the KiCad default net clearance for the nets not
assigned to a netclass.

Would our resident Eagle file format expert please take a look at this
patch to see if it makes sense?  I'm not terribly familiar with the
Eagle file format.




> regards,
> Mark.
> Seth Hillbrand <seth@xxxxxxxxxxxxx> wrote:
> 	<div dir='auto'>Hi Mark-<div dir="auto"><br></div><div dir="auto">That would be great, thanks!</div><div dir="auto"><br></div><div dir="auto">-Seth</div></div>
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