kicad-developers team mailing list archive

[Andrew Lutsenko <anlutsenko@xxxxxxxxx>]

Hi John,

Here are some big examples that I test my plugin on:
https://github.com/OLIMEX/DIY-LAPTOP/tree/master/HARDWARE/A64-TERES/TERES-PCB1-A64-MAIN/Rev.C

https://github.com/c4puter/motherboard
https://github.com/rusefi/rusefi/tree/master/hardware/frankenso

Regards,
Andrew

On Tue, Apr 16, 2019 at 2:27 AM John Beard <john.j.beard@xxxxxxxxx> wrote:

> Hi,
>
> Occasionally, there are references made to performance during
> processing of very large >8 layer PCBs (and the schematics thereof).
> However, I don't have any such PCBs to uses as a reference, and there
> are (reasonably, due to the size) none in the demos folder.
>
> I can make faked-up PCBs programmatically fairly easily (it's what was
> used in the DRC benchmarks a few weeks ago). But they are not
> necessarily representative of real workloads (or at least, cannot be
> demonstrated to be so).
>
> So, what are the biggest, meanest, most complex, processor-killing,
> resource-hogging, KiCad-crashing bad boys that people know of?
> Preferably open-source so they can be shared easily and used for
> benchmarking purposes.
>
> Cheers,
>
> John
>
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