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Message #43849
Re: DRC rules
I got tired of my text editor not highlighting matching parens so there’s now a basic rule editor in Board Setup > Design Rules > Rules.
> On 16 May 2020, at 17:02, Jon Evans <jon@xxxxxxxxxxxxx> wrote:
>
> Thanks Jeff, this is awesome. I look forward to trying it out.
>
> On Sat, May 16, 2020 at 12:00 PM Jeff Young <jeff@xxxxxxxxx <mailto:jeff@xxxxxxxxx>> wrote:
> Here’s a really dumb test file just so you can get an idea of what it looks like:
>
> (version 1)
> (selector (match_netclass "Default") (rule "Big Gap"))
> (selector (match_type track) (rule "Big Gap"))
> (rule "Big Gap" (clearance 1.5))
> (selector (match_type blind_via) (rule "Big Hole"))
> (rule "Big Hole" (hole 2))
> (rule "Small Edge" (clearance 2))
> (rule "Big Edge" (clearance 3))
> (selector (match_type board_edge) (rule "Small Edge"))
> (selector (match_layer "In1.Cu") (match_type board_edge) (rule "Big Edge") (priority 2))
>
>
>> On 16 May 2020, at 16:43, Jeff Young <jeff@xxxxxxxxx <mailto:jeff@xxxxxxxxx>> wrote:
>>
>> I’ve just merged a possible implementation of the DRC rules. I’d like to get some feedback on it, and also some testing. (Because the rules support such a wide range of possibilities it’s going to need a good deal of testing.)
>>
>> For now, it picks up DRC rules from a file named “drc-rules” in the project directory.
>>
>> There’s no GUI editor at present: use a text editor.
>>
>> Grammar is s-expr. It generally follows the ideas set down here:
>>
>> https://docs.google.com/document/d/1qvCH9aHwCzp5qtKTna4jJXuloNU0b96gAxAHSKPuXpU <https://docs.google.com/document/d/1qvCH9aHwCzp5qtKTna4jJXuloNU0b96gAxAHSKPuXpU>
>>
>> with one major exception: I found the select-a-single-rule didn’t pan out. You have to duplicate too much stuff in each rule for that.
>>
>> Also, because the DRC engine (and zone filler) don’t currently support min/opt/max the prototype implements min with Seth’s “relaxed” option.
>>
>> Top level is a list; first expression must be (version x) followed by any number of (selector…) and (rule…) expressions.
>> /*
>> * Match tokens:
>> * match_netclass
>> * match_type
>> * match_layer
>> * match_all
>> * match_area (not yet implemented with the exception of “$board”, which matches everything)
>> *
>> * (selector (match_area "$board") (rule "OSHParkClass3") (priority 100))
>> *
>> * (selector (match_netclass "HV") (rule "HV_internal"))
>> * (selector (match_netclass "HV") (match_layer "F_Cu") (rule "HV_external"))
>> * (selector (match_netclass "HV") (match_layer "B_Cu") (rule "HV_external"))
>> *
>> * (selector (match_netclass "HV") (match_netclass "HV") (rule "HV2HV"))
>> * (selector (match_netclass "HV") (match_netclass "HV") (match_layer "F_Cu") (rule "HV2HV_external"))
>> * (selector (match_netclass "HV") (match_netclass "HV") (match_layer "B_Cu") (rule "HV2HV_external"))
>> *
>> * TODO: pads for connector pins or wire pads have even larger required creepage clearances. How to encode?
>> * User attributes on parent footprint?
>> *
>> * (selector (match_netclass "HV") (match_type "pad") (match_netclass "HV") (match_type "pad") (rule "pad2PadHV"))
>> *
>> * (selector (match_netclass "signal") (match_area "BGA") (rule "neckdown"))
>> *
>> * Type tokens:
>> * track
>> * via
>> * micro_via
>> * blind_via
>> * pad
>> * zone
>> * text
>> * graphic
>> * board_edge
>> * hole
>> * npth
>> * pth
>> *
>> * Rule tokens:
>> * allow (not yet implemented)
>> * clearance
>> * annulus_width
>> * track_width
>> * hole
>> *
>> * Rule modifiers:
>> * relaxed
>> *
>> * (rule "HV" (clearance 200) (priority 200))
>> * (rule "HV_external" (clearance 400) (priority 200))
>> * (rule "HV2HV" (clearance 200) (priority 200))
>> * (rule "HV2HV_external" (clearance 500) (priority 200))
>> * (rule "pad2padHV" (clearance 500) (priority 200))
>> *
>> * (rule "signal" (clearance 20)) // implied priority of 1
>> * (rule "neckdown" (clearance relaxed 15) (priority 2))
>> *
>> * (rule "allowMicrovias" (allow microvia))
>> */
>>
>>
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>
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