kicad-lib-committers team mailing list archive

[John Beard <john.j.beard@xxxxxxxxx>]

On 02/06/14 16:22, Lorenzo Marcantonio wrote:
> Ach... wrong list. Isn't there a way to set the reply-to address for the
> mailing lists?!

There's a "List-Post: <mailto:kicad-lib-committers@xxxxxxxxxxxxxxxxxxx>"
header in the email source, and Thunderbird gives me a "Reply List"
button. What client do you use?

> On Mon, Jun 02, 2014 at 10:32:18AM -0400, Jean-Paul Louis wrote:
>> The example shown by Lorenzo is a very good example. The yellow
>> rectangle has zero value AND an extra cost, while just two lines
>> (shown in white) provide the real value of locating the chip without
>> hindering the manufacturing process.  

What is the cost of the yellow layer? It seems to me to show some useful
information (the nominal physical presence of the component, including
the extent of pad overlap) without actually being printed onto the board
and needing silkscreen, ink, etc. Unless you mean cost to the
librarians, in which case I think this c/should be optional (assuming
there was software support in the first place)?

>> On top to it, because it is just inside the guard area (outside
>> rectangle), it provide guidance for the clearance between parts.

But it doesn't help with end-to-end clearance, only side-to-side.

> In fact the specs says that silk should be on the 'maximum material'
> position. I don't remember if I drawn them that way. Anyway the idea
> is that silk should be visible after assembly for inspection, this is
> the *new* primary purpose of the silk. The *old* one, guidance for
> assembly, is mostly obsolete (machines read fiducials, not silk
> screen)

So, for now, I'm thinking that I should focus on a "simple" silk screen
skirting the maximum material condition of the component, with some
extension (and maybe dot/arrow) at pin 1? This would make footprint
wizards somewhat simpler, certainly. "Fancy" drawings could come later
if there is a place for them.

And maybe we could say the general silk screen border width is 0.2mm,
if this a known constraint of fabricators using silk-screens to do the
silk screen layer?

> some CAD system (the mentor ones, I guess, since they somewhat
> invented it) actually do DRC on courtyard to avoid collision and such.

Physical-collison-detecting DRC sounds handy - I nearly put a resistor
under a QFP on my first KiCad PCB!