kicad-developers team mailing list archive
-
kicad-developers team
-
Mailing list archive
-
Message #00552
Re: PCBNEW: "Select Layer Pair for Vias" dialog
--0-1634435548-1191290499=:47739 Content-Type: text/plain; charset=iso-8859-1
Content-Transfer-Encoding: quoted-printable
I consider that a desirable outcome would be to create a set of NC-Drill fi=
les, rather than just one such file. Ideally, there would be one NC-Drill f=
ile for plated-through holes that interconnect the component layer and copp=
er layer, another (distinct) NC-Drill file for unplated holes (that pass th=
rough the entire PCB), and another (distinct) NC-Drill file for each other =
"pair" of "Top" and "Bottom" layers (though such files would naturally only=
be associated with PCB files which used more than two copper layers, and w=
hich contained at least some vias of a "blind" and/or "buried" nature).
=20
Altium's Altium Designer application does exactly that, with its Drill Repo=
rt file (similar in concept to the Drill Report files created by KiCad) lis=
ting and indexing which NC-Drill files have been created. I'm picking that =
it wouldn't be unduly difficult to modify the source code to at least suppo=
rt separate NC-Drill files for "blind" and "buried" vias in the first insta=
nce (and in due course, to then add support for unplated holes within pads,=
and to generate separate NC-Drill files for unplated holes and plated-thro=
ugh holes).
=20
Regards,
Geoff Harland.
=20
=20
Jean-Pierre CHARRAS wrote:
<snip>
> Vias "through" connect All layers (for pcbnew from copper to component
> layer, because copper is the layer 0 and component is the layer 15).
> And therefore the m_Layer param always is 0x0F ( or 0xF0 , which is
> equivalent)
> The layer pair choice allows you only to switch easily from a layer to
> the other layer for the tracks.
> But vias are from layer 0 to layer 15 (from copper to component).
>=20
> Only blind vias or buried vias must be from layer n to layer m (n and m
> =3D 0 ..15)
>=20
> But blind vias or buried vias are experimental features, not really
> tested, and excellon files do not support them.
> (because only few manufacturers are able to made borads with these vias)
> and i don't made any board with thes vias.
>=20
> You *** MUST *** have all yours vias with layer from 0 to 15 (m_Layer =3D
> 15).
Sick of deleting your inbox? Yahoo!7 Mail has free unlimited storage.
http://au.docs.yahoo.com/mail/unlimitedstorage.html
--0-1634435548-1191290499=:47739 Content-Type: text/html; charset=iso-8859-1
Content-Transfer-Encoding: quoted-printable
<html><head><style type=3D"text/css"><!-- DIV {margin:0px;} --></style></he=
ad><body><div style=3D"font-family:times new roman, new york, times, serif;=
font-size:12pt"><DIV>
<DIV class=3Dmsgarea>I consider that a desirable outcome would be to create=
a <STRONG>set</STRONG> of NC-Drill files, rather than <EM>just</EM> <STRON=
G>one</STRONG> such file. Ideally, there would be one NC-Drill file for pla=
ted-through holes that interconnect the component layer and copper layer, a=
nother (distinct) NC-Drill file for unplated holes (that pass through the e=
ntire PCB), and another (distinct) NC-Drill file for <STRONG>each</STRONG> =
<EM>other</EM> "pair" of "Top" and "Bottom" layers (though such files would=
naturally only be associated with PCB files which used more than two coppe=
r layers, and which contained at least some vias of a "blind" and/or "burie=
d" nature).</DIV>
<DIV class=3Dmsgarea> </DIV>
<DIV class=3Dmsgarea>Altium's Altium Designer application does exactly that=
, with its Drill Report file (similar in concept to the Drill Report files =
created by KiCad) listing and indexing which NC-Drill files have been =
created. I'm picking that it wouldn't be unduly difficult to modify the sou=
rce code to at least support separate NC-Drill files for "blind" and "burie=
d" vias in the first instance (and in due course, to then add support for u=
nplated holes within pads, and to generate separate NC-Drill files for unpl=
ated holes and plated-through holes).</DIV>
<DIV class=3Dmsgarea> </DIV>
<DIV class=3Dmsgarea>Regards,</DIV>
<DIV class=3Dmsgarea>Geoff Harland.</DIV>
<DIV class=3Dmsgarea> </DIV>
<DIV class=3Dmsgarea> </DIV>
<DIV class=3Dmsgarea>Jean-Pierre CHARRAS wrote:</DIV>
<DIV class=3Dmsgarea><snip><BR>> Vias "through" connect All layers=
(for pcbnew from copper to component<BR>> layer, because copper is the =
layer 0 and component is the layer 15).<BR>> And therefore the m_Layer p=
aram always is 0x0F ( or 0xF0 , which is<BR>> equivalent)<BR>> The la=
yer pair choice allows you only to switch easily from a layer to<BR>> th=
e other layer for the tracks.<BR>> But vias are from layer 0 to layer 15=
(from copper to component).<BR>> <BR>> Only blind vias or buried via=
s must be from layer n to layer m (n and m<BR>> =3D 0 ..15)<BR>> <BR>=
> But blind vias or buried vias are experimental features, not really<BR=
>> tested, and excellon files do not support them.<BR>> (because only=
few manufacturers are able to made borads with these vias)<BR>> and i d=
on't made any board with thes vias.<BR>> <BR>> You *** MUST *** have =
all yours vias with layer from 0 to 15 (m_Layer =3D<BR>>
15).<BR></DIV></DIV></div><br>
<hr size=3D1>
Sick of deleting your inbox? Yahoo!7 Mail has free unlimited storage. <a hr=
ef=3D"http://au.rd.yahoo.com/mail/taglines/default_all/storage/*http://au.d=
ocs.yahoo.com/mail/unlimitedstorage.html" target=3D_blank>Get it now</a>.
</body></html> --0-1634435548-1191290499=:47739--
