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Re: XML import to pcbnew
"Frank Bennett" <bennett78@...>
Fri, 21 Mar 2008 15:45:55 -0000
--- In kicad-devel@xxxxxxxxxxxxxxx, jean-pierre charras
> Frank Bennett a ï¿½crit :
> I saw your board.
> There is a lot of problems:
> - Some examples: vias are flagged "through" (i.e. from layer 0 (copper)
> to layer 15 (component) but the param m_Layer said from inner 1 to
> Such vias are blind or buried vias.
> - at location 0.2400, 0.5300 there are 2 superimposed vias (a XOR mode
> redraw could be have problems, and a board manufacturer also...))
> And I found a lot of strange things (components layer is component and
> layer pad is copper. This is possible for some components (like a PC
> , usually not for smd components)
> And their outlines are put on an adhesive layer ( this is possible, but
> usually they are on silkscreen layers, an adhesive layer is intended to
> draw components like sink heater)
> This may be an explanation for some problems.
I have checked in a better svn version for project XML4PCB
with a better layer assignments, $GENERAL, $SETUP and pin nets
but I don't get any ratsnet or any network in the dsn export.
Could you take a quick look to see what I am missing in the brd
file...examples/txpr.brd is a partially routed, simple example.
I also would propose we add a Net Name tag to the $TRACK
specification...should be backward compatible, might help simplify
the ratsnet code and enable an export netlist from pcbnew.
> Jean-Pierre CHARRAS
> Maï¿½tre de confï¿½rences
> Directeur d'ï¿½tudes 2ieme annï¿½e.
> Gï¿½nie Electrique et Informatique Industrielle 2
> Institut Universitaire de Technologie 1 de Grenoble
> BP 67, 38402 St Martin d'Heres Cedex
> Recherche :
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