kicad-developers team mailing list archive

[Alex G <mr.nuke.me@xxxxxxxxx>]

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>> Which exact standard are you referring to?
> 
> IPC-7351A - Generic Requirements fo Surface Mount Design and Land
> Pattern Standard
>
Thanks! I'll see if my friend google can find it for me :).

>> Do you think you could  write a small summarry or wiki regarding these
>> 12 pages?
> 
> Mostly what I said before... but pages 12 to 16 are table with the
> 'magic numbers' to be used as a target toe/heel/side/courtyard size.
> 
> I found that there's a new IPC-7351B release, maybe that's why the new
> calculator isn't free anymore.
> 
> The IMHO difficult thing is implementing correctly the tolerance
> computation.
> 
> The whole algorithm summarized is: decide the pad size and position so
> whatever the component size, placement and pcb size is (statistically
> into the declared tolerances) there is at least so-much copper between
> the pin and the board to have the correct solder fillets. Where
> 'correct' is dictated by the above mentioned tables.
> 
> So you compute the 'maximum material condition' of the package (more or
> less using a RMS mean of the tolerances) to have the envelope of the
> package (i.e. all the space it *could* cover), then you enlarge these
> 'maxi pins' to have the required solder fillets.
> 
> For example (and I'm using quoting privileges :P), if you have
> a gull-wing lead with pitch less than equal of 0,625 mm, using the
> nominal size (i.e. Density Level B - Median) you should make lands so
> that you have 0,35mm of toe, 0,35mm of heel, -0,2mm of side (yes, the
> pad is smaller than the maximum material condition of the pin); the
> whole module should have 0,25 mm in excess of courtyard (to support
> reworking and inspection, also as a bounding box for the autoplacer).
> 
> These info are contained in 19 table (for different components) for each
> of the 3 level of density.
> 
> After that you must check for copper clearance: for example a typical
> TSSOP need a 6-7 mil clearance for the 'optimal' pads... if you need to
> use an 8 mil process you need to trim the pads: you have less than the
> statistically needed copper but yield should be good anyway. In fact, if
> you use Density Level A (Maximum) you are *required* to do manufacturing
> tests to check the yield is effective (this stuff is a nightmare for
> Q.A. engineers :D).
> 
> After you have the required clearance you just round everything to the
> nearest 0,05 mm (the easiest part :D).
> 
Not yet at headache level, but man, can they complicate things beyond
all recognition.

>> computer, and I can email it to anyone interested.
>> (I'm curious just how many people will try to attack my computer now).
> 
> Done that, have fun
> 
Thanks. I've changed it so that only root has write permissions to the
file. Anyone who wants to grab it, feel free (though keep in mind it's
only an 8Mbps connection.

Alex
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