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Message #11719
Re: A tribute to KiCad quality
On 11/18/2013 12:11 PM, Lorenzo Marcantonio wrote:
> On Mon, Nov 18, 2013 at 11:25:16AM -0600, Dick Hollenbeck wrote:
>> I find KiCad barely useable. I am in no way satisfied with KiCad. In my view it is
>> however making progress, although more like 3 steps forward and 1 step back.
>
> I do not agree with that. It's *far* from perfect, but beats every low
> cost EDA package I've ever tried. YMMV, depending on the kind of board
> you're doing (good luck with an heavily impedance controlled layout or
> modern things like via-on-pad). I recently did an UHF design (RFID
> stuff), not exactly the easiest thing but with care (and *a lot* of
> review) everything worked out.
>
> At the present time I'd say it's like autocad without any domain
> specific addon, i.e. almost anything can be done but not a lot easily
> and quickly.
>
> ATM the thing still I mostly miss are inter-class design rules (i.e.
> having 220VAC and 5VDC on the same board). Need a lot of time to verify
> and recheck. Failures in safety certification tend to be expensive:(
>
> Also a better 'drag trace' would be even more useful for me than the P&S
> router. Maybe it's a workflow issue of mine, I don't know...
>
> The 1 step back you are mentioning is probably due to the constant
> changing evolution (for example I really don't like the new opengl view
> but that's probably because it's still little more than a proof of
> concept).
The combination of CERN, Tom, Orson and Javier, put well over a hundred grand into that
specific work.
Torsten contributed to GAL underpinnings, with contributions from me also.
We are lucky to have Tom and Orson in a position to contribute, and I welcome their
further contributions and hope that their de-motivation is not a consequence of these remarks.
Without P&S routing, there's no chance in hell I would even be using KiCad, going back to
the freerouter round-tripping bridge years ago.
Dick
> Also probably something broke in the change module due to the
> new footprint library table. More testing (a lot more) is needed. Still
> I see asserts popping up sometimes when cancelling operations in pcbnew,
> for example.
>
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