kicad-developers team mailing list archive

[Lorenzo Marcantonio <l.marcantonio@xxxxxxxxxxxx>]

On Fri, May 16, 2014 at 10:51:45AM +0200, Bernd Wiebus wrote:
> Yes. But for this you need a special footprint, if you not only mount

OK got the meaning wrong
> 
> 
> >  Mostly needed for hor/ver mounting *and* for
> > pin variants (123 vs EBC vs GSD)
> 
> So special remarks like EBC or GSD should be omitted. To seldom in use.

I think the opposite is true unless in schematic you call the pins 123.
And then good luck with reversed or permuted packages. Also while
routing is quite useful to see that a pin is a gate instead of of, say,
just pin 1.

At least that's what I learnt after doing about 20 boards:P
The 'correct' solution would be a pin mapping mechanism between eeschema
and pcbnew but 1) AFAIK nobody does that, 2) there is no provision for
that in kicad and 3) it's just easier to duplicate the package and
rename the pins :D

> Everybody has to look for his used devices, wether they fit to this
> footprint. If somebody needs often needs such a spechial footprint, he
> can easily create this by themself.

A SOT-23 BJT is hardly special :D in wide use there are SOT-23 BJT, FETs
and some regulators too. Usually pinning is done in this way:
    3
    X
           << This is the standard numbering of a SOT23
X       X
1       2

Generic Pin:      1 2 3
BJT (BC817)       B E C
JFET (MMBF4391)   D S G
MOS (BSS84)       G S D

Then you have the diodes. Good luck with them. Single diode, common
anode, common cathode and series. Sometimes the zeners have a different
layout than the vanilla diode (rare). So, only for TO236 (the official
SOT23 from JEDEC) I have:

TO236-A1A2K     Common Cathode
TO236-AKC       Dual Diode, series
TO236-AnK       Single Diode (99% of the diodes out there:D)
TO236-BEC       BJT
TO236-GSD       MOSFET
TO236-K1K2A     Common Anode
TO236           Generic 123 pinning

If I had to use a JFET I'd simply duplicate TO236 to TO236-DSG and
change pin names. Usually with a text editor, it's faster:P

Regulator varies (the order is often OUT/IN/GND, but not always), if
you only want to use numbered pins then you have to put in eeschema
1 for the base, 2 for the emitter and 3 for the collector in a BJT, for
example, and so on. Just a policy decision.

I'd personally still use the proper letter and duplicate the package,
anyway :P Scenario: board troubleshooting, need to probe a component
with a scope and pcbnew open before me. Quick, where is the gate?

> I think more about "finding fast in library". My thinking ist more like
> "Diode > Standard > SMD > Housing Type. but of course, your way is also
> ok.

It's more useful to have the technology on top because you usually
decide it at the beginning and that's it (THT is a special case). Let's
say, I'm doing a board and since I want it to be cheap I decide it's
2-layer 0.2 mm clearance. I select the relevant libs and work with that.

Then during a revision I add a nasty DSP which needs 0.1 mm and four
layers. This tech change allows me to get better packages for other
components too (the 0.5 mm pitches for example have to be trimmed to
keep clearance, so they have smaller pad than the optimal ones). Swap in
the 0.1 mm tech libs and replace all the components. A review is needed
but beats having to replace them one by one (BTW that one of the reason
for the project local fptables)

> No. Omitt this EBC GSD or so thing. You would get very big labyrinthic
> librarys.

Explained that before. It's on the tail of the name so they are grouped
together. And anyway, it's a personal policy, just need to decide on it.
In fact many people doing professional work junk the builtin libraries
from the cad vendor and build their custom one depending on their
fabricator. For example my SOT23 have bigger pin than the standard ones
since they are faster to probe in that way; similarly 0603 components
have a courtyard almost as big as to 0805 ones since the couldn't be
probed otherwise. On *our* machine. And because we use flying probes.

Given this, forget the idea of the perfect library:D

> Yes, "More or less in the middle" is ok, but tell the people why. And at
> last generally pin 1 as anchor is a bad Idea.

For schematic yes. For THT components it's the standard way but they
need to program the placer anyways. For SMD is a different thing.

Many PnP tapes simply supply both of them: the centroid for the pickup
and the pin 1 position for cross checking rotation. Easier for the
production guy. OTOH you need to know what is pin 1 (IPC says it on the
standard orientation document). If I had to patch pcbnew to do this kind
of placement file, I'd say that pin 1 (to be exported) is the pin called
'1', 'A1', 'K' or '+', unless said otherwise (it would be a good thing
to add a module property to declare 'the' pin 1 if the default is not
correct).

> black box. Showing V+ and V- is also important if i use different
> isolated V+s and V-s....

I.e. most of the times, these days. YMMV, since I almost only do mixed
signal boards:D

> But in a big schematic, without different V+s and V-s i would perhaps
> show the V+ and V- pins in a partial component, to reduce the complexity
> of the schematic.

Many people do that, in fact. Personal designer decision. The problem is
that gate swapping become more difficult since you must use the locked
part option in this case (a 7400 would be 5 part, the power supplies and
the four gates).

> De morgan is seldom used here, because there are no more big locical
> gates boards around anymore. Only one or to logical ICs besides the
> controllers, and there is no need for demorgan.

Demorgan was never used anyway AFAIK, since if you can't do it on the
spot you need to change line of work anyway. But it was there on OrCAD
1.0, so maybe is a relic of the past. For opamp with power connection is
useful however.

> Personally i prefere a special partial component for the power supply.

I think that would a good holy war subject... I've seen 50% of usage in
the wild.

> But i think that the "Value Text field" should be prefilled with the
> name of the symbol for symbols and the name of the footprint for
> footprints.

No much sense for footprints since it get pulled from the netlist. Agree
on schematic; I also set the footprint to 'Pkg' on eeschema to see it
and place it in a convenient place; I like to have packages on schematic
to avoid cross referencing to the BOM. In some specialized areas (like
instrumentation) you can also see 'special' symbols (like capacitor with
a star, or a square or a dot to indicate the dielectric type). It's not
standard usage so I wouldn't care with these.

> Of course. "T" is an ancient german regional code.
> IPC is realy strange. Especially for footprint naming.......to clumsy
> for practical work.

It's a good default for automatically generated things.

> IPC calculations would be the best. But in former cases, where no IPC
> calculation existet yet, but different manufacturers, this was my
> prefered way.

The times of IPC-SM-782. Where they simply said "a 0805 has pad big so,
a 0603 has this size" and so on. 7351 instead gives you a way to
calculate them.

True story: did an SMD mosfet using the suggested package from the
manufacturer. At assembly: the solder paste don't flow in the apertures,
they are too small. Hint: solder paste apertures must be compensated
depending on how you cut the stencil...

> IXYS is starting with such packages, too. But i have to look further,
> wether they match with the IR types in some way. They are more like
> "flat packs" as far as i can see.

Ixys has even bigger things than IRF, too bad they're expensive :D In
general, things with special thermal issues have special packages. Also
usually drawing their solder mask is a PITA (and a FAQ on the user list)

Many of these new fets uses PQFN packages, as a basis. Only they add
a huuuuuge drain pad (IRFH8303 for example, and a lot of ON Semis).
Maybe Ixys are similar. However this is only a starting point since, for
example, the 8303 has a 4-pad drain, 3-pad source and a gate, while
their integrated converters (still in 5x6 PQFN) have at least 3 of the
craziest packages I've ever seen. Look at their AN-1132, you'd need at
least a couple hours to do correctly these packages!

> No. I thought about "where do you specify this reason"? Not where do you
> store this footprint. :D

Uhmm... naming convention for libraries? Directory where libraries are
stored? Never thought a lot about that:P

-- 
Lorenzo Marcantonio
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