kicad-developers team mailing list archive

[jp charras <jp.charras@xxxxxxxxxx>]

Le 23/03/2015 20:28, Wayne Stambaugh a écrit :
> On 3/23/2015 3:25 PM, Simon Richter wrote:
>> Hi,
>>
>> Am 23.03.2015 um 18:56 schrieb Chris Pavlina:
>>
>>> KiCad does not currently support standalone vias, and I think that would
>>> be a necessity before a *clean* implementation of this could be done.
> 
> This would have to be done first and it would require changes to the
> file format, zone definition and filling, and the DRC at a minimum.
> There are probably some other things I'm forgetting.  JP would have a
> better idea of the effort involved.  Once this part is complete, then we
> could start discussing tools for using standalone vias.  That being
> said, I also think this is something useful to have but as Chris eluded
> to it will not happen until after the next stable release.

Stand alone vias and stitching vias inside a copper zone are 2 different
things.

For stand alone vias (and stand alone track segments), the main issue is
to know the net which contains them, and to tell the true, I am not very
thrilled with adding stand alone vias.

During a session, this is not a major problem, but what is the right
net, after a netlist is read, and net names are modified for instance.
The answer is not obvious ( vias are not always connected to the GND signal)

Stitching vias depending on a zone is a bit different, because they are
depending on a defined entity which already manages a net name.

However changes is file format are needed (at least a zone stores the
solid copper areas, and have to also also store the vias it manages, and
some info to rebuild them, like size, pitch...)

We have also to manage zone edition, zone merging, zone refilling
(including rebuilding vias).
Zone refilling algorithm with stitching vias is certainly not obvious.

By the way, I was not impressed by the via stitching feature in Altium.

> 
>>
>> I think these vias would be placed inside a copper pour, so there is
>> something to "connect" them to. The notion of "generated" vias is new
>> though (so if I change parameters for thermal relief, these vias can be
>> deleted and recreated).
>>
>> I'd like to tack a feature request on top of that: thermal via
>> generation in pads. For my last project I simply used four rectangular
>> pads with copper on top and bottom and a hole in the middle. This works,
>> but for library submission I'd like to be able to express this in a
>> cleaner way (i.e. one large pad, with an attribute how much thermal
>> power it needs to sink).
>>
>>    Simon
>>
>>
>>
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-- 
Jean-Pierre CHARRAS