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[easyw <easyw@xxxxxxxxxxxx>]

I use this workaround ...

I manually added net number to the NPTH drill pad (with notepad)...
please find attached the pcb module

then you can use this module inside a library (import without editing 
and save lib) and it is possible to wire tracks and there is no DRC 
violations...

maybe to solve this prob in a clean way it could be nice to add the 
option to have pin nbr also for NPTH drill pad...

Regards
Maurice

On 08/06/2015 14.37, Lorenzo Marcantonio wrote:
> On Mon, Jun 08, 2015 at 01:15:39PM +0200, Tomasz Wlostowski wrote:
> > There is another way: don't use a pad to simulate a via. Letting vias
> > retain their nets (or - in case of footprints - follow the connectivity
> > starting from pads) is IMHO a way to fix this and many other issues
> > (thermal via fields, etc.)
> The main problem is another way: the NPTH conflicts with the main pad;
> I don't really care about the vias (since they don't harm DRC)
>
> Maybe special-casing hole in the same module could be a solution, if you
> trust people do to correct modules...

(module a_ANCHORS:1pinD35-NPTH-drilled (layer F.Cu) (tedit 55758F44)
  (fp_text reference J*** (at 0 -4.699) (layer F.SilkS) hide
    (effects (font (size 1.00076 1.00076) (thickness 0.2032)))
  )
  (fp_text value anchor (at 0 4.953) (layer F.SilkS) hide
    (effects (font (size 1.00076 1.00076) (thickness 0.2032)))
  )
  (fp_circle (center 0 0) (end 0 1.6764) (layer B.SilkS) (width 0.16))
  (fp_circle (center 0 0) (end -0.0254 1.6764) (layer F.SilkS) (width 0.16))
  (fp_circle (center 0 0) (end 0 3.556) (layer B.SilkS) (width 0.16))
  (fp_circle (center 0 0) (end 0 3.556) (layer F.SilkS) (width 0.16))
  (pad 1 thru_hole circle (at 0 -2.2606) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at -2.2606 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at 0 2.2606) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at 2.2606 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at 1.6002 -1.6002) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at -1.6002 -1.6002) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at -1.6002 1.6002) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask))
  (pad 1 thru_hole circle (at 1.6002 1.6002) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask))
  (pad 1 np_thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers *.Cu *.Mask F.SilkS))
  (pad 1 smd circle (at 0 0) (size 5.6 5.6) (layers F.Cu F.SilkS F.Mask))
  (pad 1 smd circle (at 0 0) (size 5.6 5.6) (layers B.Cu B.SilkS B.Mask))
)