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Re: Netclass and clearance

 


I think the following is part of the assumptions of everyone ideas so far, but I just want to state it explicitly as it's a really fundamental assumption for me.

The purpose of pcbnew is to generate manufacturing data for pcb manufacture. Users should be limited only by their imagination and manufacturers process limits, not by kicad.

DRC, (especially in it's current form) can only handle a subset of the above. And that's ok as long as we remember that DRC is an assist for many, but not all, users. (I happen to be one of the 'not all' users).

Likewise, layout assist tools as they are now only handle a subset. Again, ok as long as the user has foundation tools to make the shapes they need. Kicad does not do the best job here, but thanks to the text file format and some thankfully loose checks for correctness, external tools can do things like put arcs on copper layers and do complex interpolated shapes, after which one can still do some things in the editor and make correct manufacturing files.

Bottom line, kicad is just one stop in the chain from a users imagination to finished PCBs. Assisting the users in this is awesome. But be careful about blocking the user when they need to fall back on more basic/manual techniques to do their job.

The DRC tool is useful, but the way I used it (had to) was to generate a report files at multiple default netclass clearances with all the violations and the grep the file for the violations that were valid for me. Having DRC "pass" with no violations has no meaning once the rules are different than the netclass approach.

But while a more generic approach would be cool, it's not what I needed last night at 1am. What I needed was to be able to set a routing clearance at anytime for any amount, for the drc reporting to let me set the minimum clearance and be a little richer (distance rather than go/no-go in the file).






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