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Re: [RFC] Eeschema bus upgrades and new connectivity algorithm

 

Hello, Orson!

On 2017-12-14 13:12, Maciej Suminski wrote:
>> But when you add aliases I run into troubles to keep things separate/clear:
>> {RAM} appears to me as an unnamed bus containing the net RAM. WTF is that?
> 
> I accept you might not like it, but this comment is not really respectful.

I am sorry if my words were too harsh. I just tried to emphasize that {RAM} appears confusing to me.
There is no intention to discredit Jons work.

>> Idea: It might be nice to virtually allow folding/unfolding of the net collection contained in a bus, i.e. by showing MEMORY{*} or MEMORY{..} or MEMORY{+}, whereas the '*' or '..' or '+' is shown in a different colour. If that's still to long, I would not mind renaming the bus to MEM{..} or even M{..}.
>> A simple mouseover M{..} could pop-up to show all nets and arrays the bus contains.
> 
> I do not fully get the idea. MEMORY in this case stands for a bus
> instance, so you can have several buses of the same type without
> shorting them together. How does */../+ relate to that?

A (Kicad generic) symbol as '*' or '..' or '+' might simply help to visualize that an object (here: the bus) contains more elements (here: net names and net arrays) as shown.

Regards,

Clemens


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