← Back to team overview

kicad-developers team mailing list archive

Issue in new connectivity algorithm

 

Hi Orson and Tomasz,

This issue comes from the bug report 1744732.

In some cases (easy to reproduce), the new connectivity algo see pads as connected, although it is
not the case.

Attached a very simple case.

If 2 pads are at the same Y coordinate, and 2 horizontal track segments at the same Y coordinate are
connected to these 2 pads, the 2 pads are seen as connected.

If the Y coordinate is not common to all pads and segment ends, or if there are other segments
connected to horizontal segments, pads are seen as not connected as expected.

The stable version (in GAL mode has also a strange behavior), and works in legacy mode.

I am not very familiar with the new connectivity algo, this is the reason I ask you to have a look
into this issue.

And I will be very happy if someone could add a few (or many) comments in connectivity_algo.h:
there is not a lot of comments in connectivity_algo.* files (Read: 0 comments) for this non trivial
code.

Thanks.

-- 
Jean-Pierre CHARRAS
(kicad_pcb (version 20171130) (host pcbnew "(2018-01-22 revision 2201482)-master")

  (general
    (thickness 1.6)
    (drawings 0)
    (tracks 6)
    (zones 0)
    (modules 1)
    (nets 4)
  )

  (page A4)
  (layers
    (0 F.Cu signal)
    (1 In1.Cu signal)
    (2 In2.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.1524)
    (user_trace_width 0.1524)
    (user_trace_width 0.254)
    (user_trace_width 0.3048)
    (user_trace_width 0.508)
    (user_trace_width 0.762)
    (user_trace_width 1.27)
    (user_trace_width 2.032)
    (user_trace_width 2.54)
    (trace_clearance 0.1524)
    (zone_clearance 0.254)
    (zone_45_only yes)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6604)
    (via_drill 0.381)
    (via_min_size 0.635)
    (via_min_drill 0.381)
    (user_via 0.6604 0.381)
    (user_via 0.7874 0.508)
    (user_via 0.9144 0.635)
    (uvia_size 0.508)
    (uvia_drill 0.127)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 0.5 0.5)
    (mod_text_width 0.0635)
    (pad_size 1.55 0.6)
    (pad_drill 0)
    (pad_to_mask_clearance 0.0889)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010f0_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask true)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue false)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory Gerbers/))
  )

  (net 0 "")
  (net 1 GND)
  (net 2 SYS_PWR)
  (net 3 "Net-(R38-Pad2)")

  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.6604)
    (via_drill 0.381)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
    (add_net GND)
    (add_net "Net-(R38-Pad2)")
    (add_net SYS_PWR)
  )

  (module Modules:SOIC-8_3.9x4.9mm_Pitch1.27mm (layer B.Cu) (tedit 5A66094E) (tstamp 5A6715FD)
    (at 84.5566 68.707)
    (descr "8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (path /5A0265A7)
    (attr smd)
    (fp_text reference U5 (at 1.8034 3.175) (layer B.SilkS)
      (effects (font (size 0.5 0.5) (thickness 0.0635)) (justify mirror))
    )
    (fp_text value "CD40107BM96_(8-SOIC)" (at 0 -3.5) (layer B.Fab) hide
      (effects (font (size 0.3 0.3) (thickness 0.05)) (justify mirror))
    )
    (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer B.SilkS) (width 0.15))
    (fp_line (start -2.075 2.575) (end 2.075 2.575) (layer B.SilkS) (width 0.15))
    (fp_line (start -2.075 -2.575) (end -2.075 -2.43) (layer B.SilkS) (width 0.15))
    (fp_line (start 2.075 -2.575) (end 2.075 -2.43) (layer B.SilkS) (width 0.15))
    (fp_line (start 2.075 2.575) (end 2.075 2.43) (layer B.SilkS) (width 0.15))
    (fp_line (start -2.075 2.575) (end -2.075 2.525) (layer B.SilkS) (width 0.15))
    (fp_line (start -3.73 -2.7) (end 3.73 -2.7) (layer B.CrtYd) (width 0.05))
    (fp_line (start -3.73 2.7) (end 3.73 2.7) (layer B.CrtYd) (width 0.05))
    (fp_line (start 3.73 2.7) (end 3.73 -2.7) (layer B.CrtYd) (width 0.05))
    (fp_line (start -3.73 2.7) (end -3.73 -2.7) (layer B.CrtYd) (width 0.05))
    (fp_line (start -1.95 1.45) (end -0.95 2.45) (layer B.Fab) (width 0.1))
    (fp_line (start -1.95 -2.45) (end -1.95 1.45) (layer B.Fab) (width 0.1))
    (fp_line (start 1.95 -2.45) (end -1.95 -2.45) (layer B.Fab) (width 0.1))
    (fp_line (start 1.95 2.45) (end 1.95 -2.45) (layer B.Fab) (width 0.1))
    (fp_line (start -0.95 2.45) (end 1.95 2.45) (layer B.Fab) (width 0.1))
    (fp_text user %R (at 0 0) (layer B.Fab)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_line (start -3.6322 1.905) (end -3.7592 2.032) (layer B.SilkS) (width 0.1))
    (fp_line (start -3.7592 2.032) (end -3.7592 1.778) (layer B.SilkS) (width 0.1))
    (fp_line (start -3.7592 1.778) (end -3.6322 1.905) (layer B.SilkS) (width 0.1))
    (pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 2 SYS_PWR))
    (pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask))
    (pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 3 "Net-(R38-Pad2)"))
    (pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 1 GND))
    (pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 1 GND))
    (pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 3 "Net-(R38-Pad2)"))
    (pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask))
    (pad 1 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 2 SYS_PWR))
    (model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (segment (start 87.2566 66.802) (end 88.798 66.802) (width 0.1524) (layer B.Cu) (net 1) (status 400000))
  (segment (start 81.8566 66.802) (end 80.402 66.802) (width 0.1524) (layer B.Cu) (net 1) (status 400000))
  (segment (start 87.2566 70.612) (end 89.288 70.612) (width 0.1524) (layer B.Cu) (net 2) (status 400000))
  (segment (start 81.8566 70.612) (end 79.812 70.612) (width 0.1524) (layer B.Cu) (net 2) (status 400000))
  (segment (start 87.2566 68.072) (end 89.028 68.072) (width 0.1524) (layer B.Cu) (net 3) (status 400000))
  (segment (start 80.5266 68.072) (end 81.8566 68.072) (width 0.1524) (layer B.Cu) (net 3) (tstamp 5A2FF943) (status 30))

)

Follow ups