kicad-developers team mailing list archive

[Rene Pöschl <poeschlr@xxxxxxxxx>]

Forwarded as i accidentally pressed on "Answer" instead of "Answer 
mailing list":

How would you then design a footprint where you need the paste not to be
centered on the copper area (0201 resistors need this.)?
How would you design a footprint for a part including an exposed pad?
There the paste needs to be split up. (And yes we know our 65% paste
coverage rule will not be right for everyone but it should be ok for
most users.)

How would you design a footprint for a part with a large "exposed" pad
for thermal reasons that has a reduced are where the copper is actually
exposed. (such footprints typically require a different mask clearance
in x and y direction.)

How would you design a part where the copper pad should be a circle but
the paste pad a square? (It seems BGA footprints should be made that way
as it results in better paste stencil separation behavior)

How would you define mask defined pads for example for a BGA? (if 0 is
not a good idea for a clearance setting why should any other number be ok?)




On 27/04/18 21:36, Wayne Stambaugh wrote:
> The smallest unit in board file geometry is 1nm.  However, all
> tolerances are really determined by the capabilities of the board
> manufacturer.  I think setting all the default pad and footprint
> tolerances to zero and using the user's global settings is the proper
> way to go.  The problem I see with setting the tolerance on these paste
> and/or mask pads is the user may not notice that the tolerances are too
> small for the board manufacturer.  The best case scenario is the boards
> will be rejected by the manufacturer's DRC or in the worst case the
> boards will not reflect what the user had intended and possibly fail.
>
> On 04/27/2018 03:16 PM, Rene Pöschl wrote:
> > We (the librarians) discovered that our workflow (or is it a workaround
> > for missing features) of defining special paste or mask areas does not
> > work as intended.
> >
> > We use paste or mask only pads (no copper, only past or mask selected,
> > no pin number assigned) to specify mask/paste areas if we can not use
> > the normal way of defining them. (example a large exposed pad needs
> > split up paste areas.) These pads naturally have a clearance setting of
> > 0 which tells kicad that the project settings should be applied. (We did
> > not think about that.)
> >
> > To avoid this i assume we will need to set a small clearance in such
> > pads as a workaround. What is the smallest value possible that can be used?
> >
> >
> > ---
> >
> >
> > And a strange observation i made regarding polygon pads. One can not set
> > a negative soldermask clearance on the pad level. (soldermask defined
> > pad) But a negative clearance on the footprint level is possible. (and
> > results in the expected mask area reduction.)
> >
> >
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