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Message #39167
[PATCH] Fix zero-width line and circle in eagle-import
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To:
KiCad Developers <kicad-developers@xxxxxxxxxxxxxxxxxxx>
-
From:
Thomas Pointhuber <thomas.pointhuber@xxxxxx>
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Date:
Sat, 26 Jan 2019 16:26:23 +0100
-
Autocrypt:
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preference=signencrypt
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User-agent:
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0
Hi,
compiling KiCad gave me a bunch of those warnings, indicating problems
with the eagle importer:
```
./pcbnew/eagle_plugin.cpp:1401:21: warning: implicit conversion from
'double' to 'int' changes value from 0.05 to 0 [-Wliteral-conversion]
width = DEFAULT_EDGE_WIDTH;
~ ^~~~~~~~~~~~~~~~~~
./include/board_design_settings.h:35:39: note: expanded from macro
'DEFAULT_EDGE_WIDTH'
#define DEFAULT_EDGE_WIDTH 0.05
^~~~
```
I looked into the issue and found out that the handling for width==0 in
circles is currently wrongly implemented (it creates a filled circle),
beside of the obvious double -> int issue.
In case of wire with==0 I was not able to find a behavior other than it
is no longer visible in the editor. I kept the old behavior defined for
now (use default width), but correctly implemented it using the defined
default line width.
Regards, Thomas
From 7bf281cdec3614300b0fdf3b9ecf11eb6f6e72cf Mon Sep 17 00:00:00 2001
From: Thomas Pointhuber <thomas.pointhuber@xxxxxx>
Date: Sat, 26 Jan 2019 16:16:35 +0100
Subject: [PATCH] [eagle-import] fix handling of filled circle and default
layer width
---
pcbnew/eagle_plugin.cpp | 40 ++++++----------------------------------
1 file changed, 6 insertions(+), 34 deletions(-)
diff --git a/pcbnew/eagle_plugin.cpp b/pcbnew/eagle_plugin.cpp
index 34510224f..422c0aa19 100644
--- a/pcbnew/eagle_plugin.cpp
+++ b/pcbnew/eagle_plugin.cpp
@@ -1395,22 +1395,7 @@ void EAGLE_PLUGIN::packageWire( MODULE* aModule, wxXmlNode* aTree ) const
if( width <= 0 )
{
- switch( layer )
- {
- case Edge_Cuts:
- width = DEFAULT_EDGE_WIDTH;
- break;
- case F_SilkS:
- case B_SilkS:
- width = DEFAULT_SILK_LINE_WIDTH;
- break;
- case F_CrtYd:
- case B_CrtYd:
- width = DEFAULT_COURTYARD_WIDTH;
- break;
- default:
- width = DEFAULT_LINE_WIDTH;
- }
+ width = aModule->GetBoard()->GetDesignSettings().GetLineThickness( layer );
}
// FIXME: the cap attribute is ignored because kicad can't create lines
@@ -1732,32 +1717,19 @@ void EAGLE_PLUGIN::packagePolygon( MODULE* aModule, wxXmlNode* aTree ) const
dwg->SetDrawCoord();
}
-
void EAGLE_PLUGIN::packageCircle( MODULE* aModule, wxXmlNode* aTree ) const
{
ECIRCLE e( aTree );
PCB_LAYER_ID layer = kicad_layer( e.layer );
EDGE_MODULE* gr = new EDGE_MODULE( aModule, S_CIRCLE );
int width = e.width.ToPcbUnits();
+ int radius = e.radius.ToPcbUnits();
+ // with == 0 means filled circle
if( width <= 0 )
{
- switch( layer )
- {
- case Edge_Cuts:
- width = DEFAULT_EDGE_WIDTH;
- break;
- case F_SilkS:
- case B_SilkS:
- width = DEFAULT_SILK_LINE_WIDTH;
- break;
- case F_CrtYd:
- case B_CrtYd:
- width = DEFAULT_COURTYARD_WIDTH;
- break;
- default:
- width = DEFAULT_LINE_WIDTH;
- }
+ width = radius;
+ radius = radius / 2;
}
aModule->GraphicalItemsList().PushBack( gr );
@@ -1775,7 +1747,7 @@ void EAGLE_PLUGIN::packageCircle( MODULE* aModule, wxXmlNode* aTree ) const
gr->SetLayer( layer );
gr->SetTimeStamp( EagleTimeStamp( aTree ) );
gr->SetStart0( wxPoint( kicad_x( e.x ), kicad_y( e.y ) ) );
- gr->SetEnd0( wxPoint( kicad_x( e.x + e.radius ), kicad_y( e.y ) ) );
+ gr->SetEnd0( wxPoint( kicad_x( e.x ) + radius, kicad_y( e.y ) ) );
gr->SetDrawCoord();
}
--
2.20.1
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