kicad-developers team mailing list archive

[Christopher Buckley <mallardproductions@xxxxxxxxx>]

A few ideas:

Option 1 an error type selection menu, possibly with levels so that an error can be flagged / marked / "ignored" in successive automatic/manual rule checks until manually resolved.

Option 2 might be classifying errors by significance (ie connecting a wire from +5 to gnd:== critical (duh-op!), open pin == notice, backwards transistor or electrolytic == important) (too much work!)

Option 3 might be a setting to "flag" all potential errors (ie post it note), but ignore warnings until a specific rule check is performed manually.

Option 4, manually mark the "flag" or "net point" as "accepted" so it never shows up again (possibly dangerous ;)



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On Mon, 3/25/19, Jon Evans <jon@xxxxxxxxxxxxx> wrote:

 Subject: Re: [Kicad-developers] [RFC] online (real-time) ERC/DRC
 To: "Wayne Stambaugh" <stambaughw@xxxxxxxxx>
 Cc: "KiCad Developers" <kicad-developers@xxxxxxxxxxxxxxxxxxx>
 Received: Monday, March 25, 2019, 9:59 AM
 
 Understood. I will
 work on a user experience proposal on the schematic side,
 and I agree it makes sense to wait on the PCB side until we
 are in a better position with DRC code (which I guess might
 change dramatically as part of V6 development) 
 On Mon, Mar 25,
 2019, 11:52 Wayne Stambaugh <stambaughw@xxxxxxxxx>
 wrote:
 Jon,
 
 
 
 I would be open to a real time error ERC checking as long as
 it met the
 
 following criteria:
 
 
 
 It can be disabled by the user.
 
 
 
 A sane way to determine when it makes sense to actually
 start and stop
 
 the real time ERC testing can be designed.  I don't
 want a bunch of ERC
 
 indicators every time I add a couple of new symbols to a
 design after I
 
 have run the ERC and fixed the initial issues.  This would
 get annoying
 
 pretty quickly.
 
 
 
 On 3/23/2019 5:57 PM, Jon Evans wrote:
 
 > Hi all,
 
 > 
 
 > I would like to start laying the groundwork for online
 ERC/DRC.
 
 > 
 
 > This means, for example:
 
 > - Objects will know if they have any ERC/DRC errors
 
 > - If objects are edited, associated error markers can
 be cleared/updated
 
 > 
 
 > Eventually, we could add a (optional) mode where new
 ERC/DRC errors can
 
 > be added in real-time as the user edits.  To begin,
 I'd only be clearing
 
 > or updating existing errors (generated with the offline
 / batch ERC/DRC
 
 > process we have now).
 
 > 
 
 > For the schematic, I think all ERC checking will able
 to be done in
 
 > real-time once my new connectivity stuff is merged. 
 For the PCB, of
 
 > course there are some DRC checks that are way too slow
 to be done in
 
 > real-time, but we could explore whether some checks are
 fast enough.
 
 
 
 Real time DRC testing is a different conversation.  From
 what I've
 
 observed with some of the more complex designs I've
 tested, I don't
 
 think we are anywhere near ready for this conversion without
 making a
 
 lot of performance improvements to our DRC code.
 
 
 
 Wayne
 
 
 
 > 
 
 > I would start with the schematic ERC since that's
 where my head is at
 
 > right now, but what I do should be able to carry over
 to PcbNew in case
 
 > it ends up working well.
 
 > 
 
 > Any thoughts on this?
 
 > 
 
 > -Jon
 
 > 
 
 > _______________________________________________
 
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 > 
 
 
 
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