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Re: Stability Under Load


On Fri, 26 Aug 2011 20:26:55 +0100, Gordan Bobic <gordan@xxxxxxxxxx> wrote:
On 08/21/2011 06:50 PM, Julian Andres Klode wrote:
On Sun, Aug 21, 2011 at 01:09:09PM +0100, Gordan Bobic wrote:
On 08/21/2011 12:27 PM, Julian Andres Klode wrote:
On Sun, Aug 21, 2011 at 12:06:39PM +0100, Gordan Bobic wrote:
Really? It complains about a max of 1000mV? On my AC100 975mV and
above produces no error. What model did you say you have?
Yes, a 10V. It should be fairly obvious the cpu_millivolts in
tegra2_dvfs.c includes 1100, the default level is 1100, as can
be seen in cpu_speedo_max_millivolts array, and

Hmm, that's interesting. So how do the differences between what's in
tegra2_dvfs.c and what's in board-paz00-power.c get reconciled?
Aren't these settings redundant?

I'm also curious how come my powertop is showing 1000MHz with no
errors in the log when I set SM1 to 975mV.
Buggy powertop? The 1000 MHz is linked to 1100 mV in the DVFS
code, I annotated the following cpu frequency table with the
corresponding voltages.

	{ 0, 216000 },	/*  750 mV */
	{ 1, 312000 },	/*  800 mV */
	{ 2, 456000 },	/*  850 mV */
	{ 3, 608000 },	/*  900 mV */
	{ 4, 760000 },	/*  950 mV */
	{ 5, 816000 },	/* 1000 mV */
	{ 6, 912000 },	/* 1050 mV */
	{ 7, 1000000 },	/* 1100 mV */

There is no way that I can see how you would be able to get
to 1 GHz @ 1 V without also modifying the corresponding
tables in tegra2_dvfs.c:

	static const int cpu_millivolts[MAX_DVFS_FREQS] =
{750, 775, 800, 825, 850, 875, 900, 925, 950, 975, 1000, 1025, 1050, 1100, 1125};

Given my observations in a previous email, I made some assumptions
and changed this array to the following:

static const int cpu_millivolts[MAX_DVFS_FREQS] =
  {850, 850, 850, 900, 1000, 1000, 1050, 1050, 1100, 1100, 1100,
1100, 1100, 1100, 1100};

The idea was that if I am seeing the following with the default values:

216MHz -> 750mV
312MHz -> 750mV
456MHz -> 750mV
608MHz -> 825mV
760MHz -> 875mV
816MHz -> 875mV
912MHz -> 925mV
1000MHz -> 975mV

I could adjust those voltage values to what I want them to be.

After a bit more digging, trial and error, it seems that cpu, core, and aon voltages all have to be increased by the same amount. I tried this by 100mV (975mV CPU -> 1075mV) and by 200mV (to 1175mV) and it seems to work.

1075mV still wasn't entirely stable.

1175mV I haven't managed to shake lose in terms of errors yet but under heavy compiling load the overheat protection kicks in and the machine powers off completely, and you can't switch it back on until it has cooled back down a bit. I can confirm that at +200mV the underside does get quite hot under load - not exactly unexpected when the thermal output is increased by 45%. There may be a bit that can be carved out of this by keeping some of the other voltages relatively a little lower, and it may not need as much as 1175mV, so I'll keep experimenting. Does anyone actually have a spec document for what the voltages for Tegra2 are supposed to be? I've googled it and couldn't find any such official documentation.

So it seems the voltage for 1GHz is really tightly wedged between stability and overheating. Has anyone devised a tidy and unobtrusive cooling mod for these? the main problem I foresee is that the CPU is pointing up on the motherboard, so there is very little scope for attaching a heatsink and it wouldn't be particularly helpful because the keyboard would be in the way.