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Message #01005
Re: ok to svn up: first test and differences
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To:
kicad-devel@xxxxxxxxxxxxxxx
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From:
jean-pierre charras <jean-pierre.charras@...>
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Date:
Fri, 15 Feb 2008 11:58:19 +0100
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In-reply-to:
<9d2084740802142138g11b0f64bpdcb32f9f2e08e44a@...>
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User-agent:
Thunderbird 2.0.0.9 (Windows/20071031)
Tim Hanson a écrit :
Hi Jean-Pierre,
I've checked this functionality, and it seems to be working with svn
v. 758. One thing that we must be careful not to do is connect
pinsheets with the same name, as multiple instances of one schematic
will necessarily have pinsheets of the same name, and the user will
not want them implicitly connected. I've attached two schematics
(twores.sch is the root schematic) to show what I think is correct
behavior & have examined the generated pcbnew netlist (looks ok?),
feel free to comment.
Where are the attached files ... ?
I tested the net version and netlist and erc seems work ok.
But the current eeschema version does not read old annotation.
Therefore the first annotation changes all components references (they
are seen as not annotated).
This will break all old boards made with previous eeschema version.
So i cannot test a new netlist with old existing large boards.
Also eeschemas crashes after creating a new hierarchical sheet when
entering this sheet (tested under XP)
GDB said:
Program received signal SIGSEGV, Segmentation fault.
0x004d51a5 in WinEDA_SchematicFrame::BestZoom (this=0xbd710c0)
at f:/kicad-sourceforge/trunk/kicad/eeschema/schframe.cpp:356
356 dx = GetScreen()->m_CurrentSheetDesc->m_Size.x;
Other (small) problem:
the reference is not displayed after loading a new component from lib,
until an annotation is made (or a part selection, for multi parts per
package components).
I would also like to make it so component pins along with a segment
are connected to that wire segment. Having to place junction items
along a line of bypassing caps is kinda annoying and nonintuitive, but
I am afraid of changing the behavior for fear of breaking some
schematics. What do you think?
Do not change the behavior.
But a possible and welcomed enhancement (which does not break old
schematic) could be automatically creates junctions after creating a
wire, put or move a component.
This is currently the case for new wires starting or ending on an
existing wire.
(and better: also remove useless junctions after moving or removing a
wire or a component).
This approach does not change the old behavior for netlist, erc and
others features (dragging an item, deleting a connection for instance)
and does not involves many changes in the existing code.
Again, thanks for your work.
--
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex
Recherche :
GIPSA-LIS - INPG
46, Avenue Félix Viallet
38031 Grenoble cedex
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