Lorenzo and all,
I see in your last very descriptive email, that the number of copper
layers seems to be limited to 16.
Does that mean that my 20 layers backplane will have to use 4 custom
layers that really will be copper. Will the routing of those custom
layers be even possible? How pcbnew will treat those 4 new layers?
Will I be able to have vias that connect to those layers?
High speed digital systems routinely have backplanes with 20 or more
layers, and a thickness varying from 3.2mm to 6.35mm. And due to the
need for impedance controlled layers, there are quite a few power
layers to generate strip-lines, and other distributed constant lines,
so vias with thermal relief are also needed with a way to edit the
way the thermal relief is done (signal versus high current). I have
not found a way to create thermal relief in vias. Is it described
somewhere?
Could we use a PCB stack-up file that would define a set of
attributes for each layer. The attributes would be a Layer ID, Layer
Type, Layer Position in the stack, Usage that would let us know is it
is a physical layer (Board blank, Copper, Solder Mask, Solder Paste
screen, Silk Screen, etc..), or a documentation layer (Assembly
drawing, BOM, ECO1-N, etc..).
