kicad-developers team mailing list archive

[Lorenzo Marcantonio <l.marcantonio@xxxxxxxxxxxx>]

On Thu, Jun 05, 2014 at 10:02:12AM +0200, Tomasz Wlostowski wrote:
> I don't think it's possible for the moment. Defining custom via/pad stacks
> is a quite big work package in itself and IMHO can be decoupled from the
> layer extension WP. I'm not even sure if one can define a via without
> antipads on internal layers (Lorenzo?)

OK. Padstack support would be a *big* work order in itself. pcbnew
simply has no concept of antipad; the antipad is simply the clearance of
the via (from the track class) and the clearance from the plane fill
(from the fill).

Via are in fact track segments, not pads. Another useful attribute for
them would be selective tenting (for heat transfer vias). I don't
remember exactly how they interact with fills (i.e. if they support
thermals or similar options).

Other things 'desiderable' for pads/padstack: current definition calls
for either top, bottom or *all* copper layers. All of these have to be
the same size. In relatively uncommon situations you could have the need
for the following:

- Having different antipad (clearance) on inner layers;
- Omitting altogether the pad, keeping the antipad (for manufacturing
  and/or signal integrity purposes); it depends on the metallization
  process how to do that: some processes can plate without copper
  support, other ones need a nominal annulus to 'grow on';
- In alternative, having smaller pads on inner layers but with the same
  antipad (reduces capacitive coupling)
- With 'inner layers' possibly all or only some of the inner layers.

(the old orcad pcb386 supported this, albeit in a very complex way...)
So it would involve a huge modification to the pad UI and file format.
The 'simpler' structure would involve exploding a component pad in
multiple ones (one for layer) and some smart way to collect them
together... (bonus: since each layer would have its subpad no more
LAYER_MSK, yay!)

> High speed parameters (such as dielectric type, Er, thickness, copper
> thickness, reference planes, loss tangent) could be stored per-layer in a
> generic attribute block (type-name-value). This way we could add such
> parameters without changing the file format specification.

The GENCAD method :D

Keep all of this aside for another work order.

-- 
Lorenzo Marcantonio
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