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Re: Netnames convention. Was: Boomerang[...]

 

Le 16/01/2015 13:38, Daniel Dawid Majewski a écrit :
> In response to a message written on 16.01.2015, 09:38, from jp charras:
>> The pcb file has no issue, no mess.
>> The Layers section is perfectly valid
>> Copper layers can be renamed by the user.
> OK, I'm also wondering about how is possible to achieve and modify list
> of used layers in python interface.
>>
>> Your board is broken:
>> Some zones are connected to nothing.
>> For instance, the main zone has a net name = /GND, and many pads have a
>> net name = GND which is not the same net.
> OK, thanks for the tip, I'm tired recently and I am surprised that this
> had not noticed before.
> Usually I'm not using cvpcb, so everything of eeschema→→pcbnew goes by
> netlist. IMHO there's some mess in eeschema: Netnames generated from
> netlabels(usually yellow) are preceding with additional „/”, although
> generated ones from Global Labels(usually red in frame with right/left
> in/out endings, similar to angle bracket) hasn't that preceed…
> Is here someone, who can explain usability of this ?
> I like to have netnames exactly, as I name it…
> 
> I'm checking on that list Checkbox("I don't like any extra, not ordered
> „/” in net name.") :]

Like C/C++ variables, there are local or global netnames.

Local netnames are prefixed by the name of the sheet path.
global netnames are not prefixed
All EDA tools I know do that, or something like.

And this is not a mess, this is just mandatory.

"I like to have netnames exactly, as I name it"

Perhaps you like, but you cannot.
At least as long you are using a schematic tool which knows what is a
hierarchy and complex hierarchies, and therefore local and global netnames.


-- 
Jean-Pierre CHARRAS


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