kicad-developers team mailing list archive

[Lorenzo Marcantonio <l.marcantonio@xxxxxxxxxxxx>]

On Thu, Jun 04, 2015 at 10:23:40PM -0500, Adam Wolf wrote:
> Years ago, I thought it was that the schematic was a "logical"
> representation of your circuit, and the assignment of footprints to
> schematic symbols was where you chose parts, especially for things like
> fets.

Yes and no. It depends on how you structure the library (both of them). 
Schematic and footprint are tied by pin number. When you have components
with 'permutations' you have two choices; either

- Call the pins with their official JEDEC pin number (i.e. 1-2-3) and use
  a different schematic symbol for each permutation (NPN-BCE, NMOS-GDS
  and so on); or

- Call the pins with their 'functional' name (E, B, C, G, S, D,
  whatever) and replicate the footprint with the needed permutations
  (TO236-BCE, TO236-GDS and so on)

I can assure you that both solutions have the same problems; they just
shift them from eeschema to pcbnew and back :D

It was simply decided in the library guidelines to follow the first
approach (because it can be somewhat easier to maintain), just that. My
libraries use the second one (I prefer to see the pin name because the
'oh that's the gate must be careful' impression it gives).

Luckily these days packages are mostly standardized (except for the rare
'reverse' part option, which exists *exactly* for layout purposes!)...
in a 3 pin transistor you can be 99% sure that pin 1 is the base/gate
and pin 2 the collector/drain (that's also for heat and die bonding
reasons...)

> Is this a transitory thing, or is this the way we've chosen to set up the
> official kicad libraries?

Official rule, if you want to use the standard libs, that's the way they
are done.

-- 
Lorenzo Marcantonio
Logos Srl