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Re: IPO_PROPERTIES in Via placement?
On 10/10/2018 12:21 AM, Jeff Young wrote:
> Can you say more about the net ties code? Does it have a properties dialog?
Not during placement, I think, and I hope to get away without any
The general idea is that net ties exist either standalone or modify a
via or pad.
Standalone, they behave like copperless pads that need to be connected
to all the nets they tie together, and in the area of the net tie, DRC
will not report errors for the connection. When they are merged with a
via or pad, the same thing applies to the modified object.
When the netlist defines a net tie, it gets instantiated during netlist
load, and placed as if it were a component. The user can then move it
around, or drop it on top of a pad or via to merge it. Un-merging will
probably be a menu entry.
A net tie inside a zone that it is connected to should stop the zone
from pulling back from a trace connected to the net tie, but only on the
side at the end (see picture). For net ties coinciding with pads inside
zones (i.e. the shunt resistor use case), I need a similar mechanism.
Main use cases are
- shunt resistors: traces start in a pad that is connected to a zone,
but should not be merged to the zone
- decoupling capacitors: the netlist defines that the IC supply pin and
the capacitor pin are connected to the supply network through a net tie,
which makes the ratsnest show lines to the appropriate capacitor
- zone to zone connections: a net tie is placed on the boundary between
There are two cases when net ties have extra properties: when they are
standalone (then they need a layer ID), and when they are placed between
two zones (then they need a width). In all other cases, these can be
inherited from other objects.
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