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Re: IBIS / SPICE simulation


Hi Fabien,

If you are interested, we should move on with this projet.

I would care for the ngspice issues, you might care for the IBIS specs and the parser.

Are there 'standard' circuits for driver and receiver?
These should be defined as ngspice subcircuits with adequate parameters. The IBIS parser then should care for filling in the parameters (data for R, L, C etc and the driving conditions). The subcircuits would then be included into the ngspice netlist by several .include commands.

transient, ac and dc simulation are available in ngspice.

ngspice already has both: voltage vs time tables ( rising / falling waveform ) and current vs time tables, both reading their data from files. So in an intermediate stage the IBIS parser should write these files. In a final stage, when the parser may be integrated into ngspice, these data could be handled as memory arrays, after a short re-write of these tables.

I see the parameter extraction from the PCB as the most critical (and diffucult) step. Even if there is some work going on, this finally has to be as simple as possible and reliable (for the user). Probably we will need another interested volunteer to work on this specifically for this IBIS/KiCad integration.

KiCad integration would be to define symbols for the drivers, receivers (and the PCB channel?), the subcircuits will be linked to these symbols, and then the simulation can be started from within KiCad.

I guess that this forum is not the adequate place to discuss all the tiny details for this project. So would you mind to set up a github or gitlab (or whatever) project for the IBIS parser? We then might use the issue tracker to move on with specification and discussion.

Concerning license, I would suggest to you to copyright the new code and then post it under a 3-clause BSD. GPL is not acceptable because it is incompatible with ngspice integration.



your  understanding is correct :)

Just some extra points :
- Depending on the working frequency, and the type of signal, we'll need transient analysis or AC analysis. No special needs for DC ( for DC voltage drops, we'll simply use a resistor network I guess ) ( AC will be needed for power integrity, in such cases, we want to see the network impedance VS frequency, but I think that is not different from a standard spice AC analysis ) ( Regarding signal integrity, transient analysis is, I think, more important )

- We'll usually have only one driver but we can have many receivers ( including some unintended ones, due to parasitic parameters ). - I don't know if there is such a thing as an "IBIS only" simulator, but I saw people converting IBIS model to SPICE. - The IBIS standard specifies where are the resistors, capacitors, voltage sources in a buffer, so the equivalent spice model should be "easy" to get. - in IBIS, parameters are mainly values ( R, L, C ), voltage vs time tables ( rising / falling waveform ) or current vs time tables ( eg: clamp diodes ) - We can also have R L C matrices, for a single chip. For instance, the C matrix contains information about capacitive coupling between the pins of a single IC.

Parasitic extraction should be handled by Kicad ( where the board geometry is defined ) , some work is already ongoing for that. For now, an easy parameter to get will be the time delay, and using ( lossless ? ) transmission lines, we could already get a lot of info.


Fabien Corona

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