kicad-lib-committers team mailing list archive

[John Beard <john.j.beard@xxxxxxxxx>]

On 02/06/14 22:37, Jean-Paul Louis wrote:
> I was talking about the engineering cost to remove any silk screen
> lines from the soldering pads, not the cost of the silk-screen layer
> by itself. There is a small cost added if you want markings on your
> board.

But the fabrication/assembly layer (yellow in Lorenzo's drawing) is not
a silk screen layer? Isn't it a reference layer that is not part of the
physical board, or have I misunderstood? I do realise that the
fabrication layer is not supported in KiCad, I am speaking
hypothetically anyway.

> Often, people who do not make a living designing boards, do not
> realize that everything they ask for, often can be done at a cost.
> But the added cost might be prohibitive for a small number of boards.

I am one of those amateurs, I must admit, and did not know it can cost
more to exclude a silk screen from pads. No such thing as a free lunch,
I suppose. I will be more careful in future!

Thank you for your advice,

John