kicad-developers team mailing list archive

["�vind Aabling" <Oyvind.Aabling@xxxxxxxx>]

On Fri, 10 Sep 2010, Øyvind Aabling wrote:

> On Sun, 5 Sep 2010, Øyvind Aabling wrote:
>
> []
> > I've now added the perl code, released under
> > "GNU GPL 3 or later", it's in revision 5 :-)
> >
> > I'll address the various library issues in the next revision
> > (some of them needs double-checking of datasheets, etc.):
> >
> > * DB/DSUB mounting pad size (the consensus seems to be 7.4mm :-),
> > * The SOD523 SMD diode with overlapping pins,
> > * The SMD pads on SMD Alu Electrolytes (C-AEC-*),
> > * LED pin numbering (ouch),
> > * DFN vs. TDFN (they're probably the same ...).
>
> Except for the DFN vs. TDFN clarification,
> these issues have been addressed in revision 6.
>
> The LED pin problem turned out to be not the pins, but that both the
> silkscreen and the 3D body was rotated 180 deg - I have double-checked
> with the eeschema LED symbol and actual LEDs and a 1.5V battery
> (it was a half-dead battery, so no burned LEDs even w/o a resistor :-)
>
> Also, I've added perl/README.perl, which is a very quick and very
> incomplete perl tutorial, and perl/README.pcblibs which is more
> useful, as it contains an overview of the pcblibs code structure.
>
> If anything in perl/README.pcblibs is unclear (or
> missing), lemme know, and I'll try to clarify.
> For further info, Use the Source, Luke, or ask me :-)
>
> Øyvind.

Revision 7:

Added missing silkscreen to BR-DFM and BR-DFS.

Also, I've had some problems with rsync(1) getting confused
over the .wrl timestamps (mtime), which were inherited from
the part (i.e. unchanged if the module entry didn't change).
Now, the .wrl files have their own timestamps, to ensure that
rsync copies changed files, even if the size is the same :-)

This rsync confusion caused me to miss some weird pin shapes on
some of the LEDs in rev 6, but that's also been sorted out now :-)

Last, I've added timing statistics to pcblibs, so
that you can see, where it's spending its time:

compilation:   1 second
createlibs:   12 seconds
writelibs:     1 second
writedims:     0 seconds
writewrls:    27 seconds
missingdims:   0 seconds
writepro:      0 seconds
total:        41 seconds

Not surprising, 66% of the time is spent generating the VRML file contents
from in-memory structures, and comparing that to the existing .wrl files.
30% is spent creating the 914 parts in memory
(footprint, silkscreen and 3D), and the remaining
~4% is spent compiling the perl code and other minor tasks.
On average, it takes 13ms to create a part,
and in total, it takes 44ms per part.

These times are for a 2.67GHz Intel Core i7, and could be heavily
reduced (by at least a factor 5) by adding multithread support to
pcblibs (I might do that one day, just for the hell of it, and to
reduce that annoying ~3/4 minute long wait for a make :-).

Øyvind.