← Back to team overview

kicad-developers team mailing list archive

Re: Sweet parser

 

Hi Dick,

Taking this off list for a moment to get your input:

I read over the latest version (2964) of
'eeschema_part_sexpr_format_EN.otd' in the lp repository today and
have several more questions and thoughts regarding the graphic
primitives. There seems to be some inconsistency in the way points are
specified and I'm wondering if it's intentional or an oversight in the
evolution of the document. In the example part "dual_input_nand_a":
---
  - arc specifies a 'pos' of (2,0) - does this refer to the center of
the arc? If so, is there a reason not to use the term 'center' as is
done with a circle?
  - arc specifies start_angle and end_angle, which are not documented
above in the definition for arc
  - arc specifies two terms each that begin with 'start' and 'end',
would it be worth condensing this into (start [(xy X Y)] [(angle
ANGLE)]) or even (start (at [X Y] [ANGLE]))?
  - arc specifies a line_width of 0, what does this mean? Is it a hairline?
  - arc specifies a fill of none, should this be the default so we can
do away with the explicit statement?
  - arcs: How are over-determined arcs drawn? If the angles doesn't
match the xy coords, which control?
  - arcs: Would it be overly difficult to specify an arc with 3
points: start, through, end?

  - polyline: How does this differ from a line?
  - polyline specified using (xy X Y)... instead of(pts (xy X Y) ...)
as documented
  - polyline specified with line_width 0 (as above)
  - polyline: can an anchor point for the polyline be specified? (pos X Y)?
  - polyline: would it be possible to allow polylines with polar
coordinate points? Perhaps (polyline (pts (xy 3 5) (polar 4 60) (polar
4 120) (polar 4 180) (polar 4 240) (polar 4 300) (polar 4 360))) to
draw a hexagon with side lengths of 4 starting at 3,5?


  - pin specified as "(pin input line (at -12 2 3.6 180)", what does this mean?
  - pins: the font size is specified exactly the same 10 times within
a 28 line file, could this be specified as the default within the part
perhaps?
  - pins: visibility also specified twice for every pin, could we
somehow wrap or group these when we have a large number of the same
type? Is visibility something that the user can toggle, for instance
to connect those pesky logic gate power supply pins to the isolated
regulator when desired?

  - text: Might I suggest that font-sizes be deci-pins (dp)? That
would make a 10dp font as high as the spacing between pins. I think
8dp would be a reasonable default text size for labeling pins, giving
you 5% clear below and 15% clear above.

---

Also, on the topic of the pin_swap, as we discussed on another thread...
A pin is defined to have only a single signal, which may be blank; is
it possible to have multiple signals?

Would you be receptive to the idea of replacing padname with pinname
for the unique identifier? For the NAND we'd have pins A B C GND,
using pads 1 2 3 7. (VCC is apparently also on pin 7, according to the
part spec :) ) This would make the swapping and renumbering much
clearer to my mind.
  (pin_rename A D) (pad_remap D 4)
  (pin_rename B E) (pad_remap E 5)
  (pin_rename C F) (pad_remap F 6)

It would also make supporting multiple packages clearer. The pin names
don't change on the part, only their mapping to the footprint does.
Maybe even something like allowing multiple (padname "NUMBER" (pkg
"PACKAGE") (font ..) (visible YES)) so we could get it right on the
footprint without having to mess with it? Also, out of curiosity, why
the longer 'padname' as opposed to simply 'pad'? Also the term
'alternates' seems misleading if the functionality is being used for
units that may not be interchangeable, would 'import' convey the
appropriate meaning?


Here's my take on a 7400 with lots of inheritance for good measure:

(part "dual_input_gate"
  (reference "U")

  (pin_style (font(size 8)) (length 6) (visible yes))
  (signal_style (font(size 8)) (visible yes))
  (pad_style (font(size 8)) (visible yes))
  (line_style (stroke 2))

  (pin "A" input (line (at -12 2)) (signal "A"))
  (pin "B" input (line (at -12 2)) (signal "B"))
  (pin "Q" output (line (at 0 12) (angle 180)) (signal "Q"))

  (hint (pin_swap "A" "B"))
)

(part "dual_input_and_gate" inherits "dual_input_gate/rev1"
  (arc (start (xy 2 -4) (angle -90)) (end (xy 2 4) (angle 90)))
  (polyline (pts ( (xy 2 4) (xy -6 4) (xy -6 -4) (xy 2-4)))
)

(part "dual_input_or_gate" inherits "dual_input_gate/rev1"
  (arc (start (xy -8 4)) (through (xy -6 2)) (end (xy -8 -4)))
  (line (start (xy -8 4)) (end (xy -4 4)))
  (line (start (xy -8 -4)) (end (xy -4 -4)))
  (arc (start (xy -4 4) (angle 90)) (end (xy 6 0) (angle 30)))
  (arc (start (xy -4 -4) (angle -90)) (end (xy 6 0) (angle -30)))
)

(part "dual_input_nand_gate" inherits "dual_input_and_gate/rev1"
  (pin "Q" (bubble yes))
  (alternates "dual_input_nand_gate_demorgan")
)

(part "dual_input_nand_gate_demorgan" inherits "dual_input_input_or_gate/rev1"
  (pin "A" (bubble yes))
  (pin "B" (bubble yes))
  (alternates "dual_input_nand_gate")
)

(part "7400_dual_in_nand_gate_a" inherits "dual_input_nand_gate"
  (pin_rename "A" "A1")  (pin "A1" (pad "1"))
  (pin_rename "B" "B1")  (pin "B1" (pad "2"))
  (pin_rename "Q" "Q1")  (pin "Q1" (pad "3"))
)

(part "7400_dual_in_nand_gate_b" inherits "dual_input_nand_gate"
  (pin_rename "A" "A2")  (pin "A2" (pad "4"))
  (pin_rename "B" "B2")  (pin "B2" (pad "5"))
  (pin_rename "Q" "Q2")  (pin "Q2" (pad "6"))
)

(part "7400_dual_in_nand_gate_c" inherits "dual_input_nand_gate"
  (pin_rename "A" "A3")  (pin "A3" (pad "8"))
  (pin_rename "B" "B3")  (pin "B3" (pad "9"))
  (pin_rename "Q" "Q3")  (pin "Q3" (pad "10"))
)

(part "7400_dual_in_nand_gate_d" inherits "dual_input_nand_gate"
  (pin_rename "A" "A4")  (pin "A4" (pad "11"))
  (pin_rename "B" "B4")  (pin "B4" (pad "12"))
  (pin_rename "Q" "Q4")  (pin "Q4" (pad "13"))
)

(part "7400"
  (value "7400")

  (pin "VCC" power_in (point (at 0 6)) (font(size 8)) (signal "VCC")
(pad "14") (visible no))
  (pin "GND" power_in (point (at 0 -6)) (font(size 8)) (signal "GND")
(pad "7") (visible no))

  (import
    "7400_dual_in_nand_gate_a/rev1"
    "7400_dual_in_nand_gate_b/rev1"
    "7400_dual_in_nand_gate_c/rev1"
    "7400_dual_in_nand_gate_d/rev1"
  )
  (hint (alt_swap
    "7400_dual_in_nand_gate_a"
    "7400_dual_in_nand_gate_b"
    "7400_dual_in_nand_gate_c"
    "7400_dual_in_nand_gate_d"
  )
)


Thanks again for all your time and effort!

Take care,
    ~~~Chris Giorgi~~~




References