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Message #10103
Re: layer based constraints
Thinking about it, I think, there are, indeed situation, when it makes sense
to define constraints for "NETxxx on layer yyy". This would be, for example,
impedance controlled tracks. They have to have a defined width which is
different on each layer and only applicable to certain nets. But now, that
we're talking about keeping it simple, we must ask ourselves:
- How many impedance controlled lines are there?
- On how many different layers do I place them?
So, the most flexible way, would indeed be sort of a matrix. Each net has a
set of constrains for each layer.
I'm still not quite sure, if this is, what you want to do, simplified to
outer and inner layer instead as for each layer. But even then, you have to
define a set of constraints for each net twice. And I think, the "strange
cases" emerge much more if you're doing it this way. What if you forget to
define the "high curren net constraint" on inner layers? Then you're routing
this net and switch to the inner layer. Which is to take? default?
See what I mean? Actually, I think the really clean way would be that you
HAVE TO defin net constraints. And only for the nets you want to apply
ADDITIONAL constraints, you add a net constraint.
But as we have the "default constraint", we can prevent us from forcing the
user to do it that way, which is of course a good thing. But as soon as
there ARE different layer constraints, we can't handle this any more with
net constraints in an elegant way. The logical step would be the matrix I
mentioned above. But this is pain in the a** to configure. And in most cases
it would be again copying numbers. And, I can't imagine a simple user
interface for that. That's why I said to myself: Instead of a matrix, I want
these two indipendent constraints. Because most of the time, (and in my
particular case) this is, what I want to model.
-----Ursprüngliche Nachricht-----
From: jp charras
Sent: Saturday, April 27, 2013 12:57 PM
To: Simon Huwyler
Cc: kicad-developers@xxxxxxxxxxxxxxxxxxx
Subject: Re: [Kicad-developers] layer based constraints
Le 27/04/2013 11:40, Simon Huwyler a écrit :
Hi Jean-Pierre,
see my responses below.
...
right. -But - don't get me wrong, i consider Kicad a tool that can
easily compete with professional tools - but it is used by many
hobbyists. An without wanting to do some advertising, seeedstudio (among
with another supplyer having exactly the same constraints - actually the
same fabs, I suppose) is by far the cheapest provider of prototype PCBs
I know.
The first question I am thinking is:
Why a by layer constraints.
Why do not have only 2 min clearance values: one for outer layers, one
for inner layers.
I also thought about that. Would also be good, yes.
It could fix some of issues created by multiple constraints.
Because there is no more multiple constraints.
The answer (remember : having both power and easy to use features is
not easy: you often should choose between them) is very important:
In Design Rules we have already one constraint. Just a second
constraint will fix your issue.
yup.
Remember we have constraints for minimal values for:
clearances, tracks, vias, microvias, and should have also minimal
annular ring for pads and vias.
Having values for each layer in a 16 layer board is a serious
constraint... for users.
agree. In most cases, you just repeat numbers. Max flexibility, at a
price.
This is the kind of decision we should always take:
Max flexibility or price.
I know you said: leave these values to 0 when not used.
Yes, but I am not convinced: For the user, they are in a major dialog,
For the user, the Design rule dialog have already these constraints.
when these values are not to 0, which value is used ?
well, here a disagree. For me it's clear that it must be the one that is
more restrictive. And a very short "pop up explainer" (don't know the
term) could tell you this.
Remember also the calculation time is a major constraint in DRC.
I know. That's why I wanted to keep it simple.
By the way I had a look to your patch, and i believe the minimal track
width defined in layers silently overrides the track width set in net
classes.
Very well possible. As I said, it's just something to get the "look and
feel" for it. Not tested, hacked somwhere between midnight and
morning... :-)
Good programmers never sleep.
(I am not a good programmer)
This is not good. You can just set a DRC error.
yup. I'd say, it's even very bad! :-)
In some cases (namely for tracks having a specific impedance) you
should have to use the defined width.
Yes. But in these cases, the constraints for these must be greater than
the layer constraint. Why? Because the layer constraint is intended to
represent a manufacturing limint. So, I can not place a 0.05mm track on
a PCB with width constraint of 0.15mm just because it has to match the
impedance.
This is a DRC error.
You have to match the impedance (otherwise the signal integrity is broken).
Therefore you have to fix this issue:
change PCB width constraint and board price (i.e. manufacturing limit),
or the track width and epoxy thickness ...
but only the designer knows what is good or can be made.
Pcbnew just should set a DRC error.
That's why I keep stressing that I stongly believe that always the most
restrictive constraint should be taken.
Actually, no need to say thank you for working on Kicad! I honestly did
this thing for myself. And I can use it very well. It's me who must not
only say thank you for providing kicad, but to enable me as user to
enhance it for my (special) needs by providing it open source!
I agree with you that it's not a good idea to just pack anything on the
release branch without discussing about alternatives.
Perhaps this is a good idea: you can show a demo or a proof of your idea.
This is very important.
With a demo, discussing about alternatives or enhancements is more
productive.
More work, and more benefit.
--
Jean-Pierre CHARRAS
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