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Message #39680
Re: Bus upgrades merge (was: V6 merge priority)
Jon,
On 3/11/2019 9:55 AM, Jon Evans wrote:
> Hi Wayne,
>
> I will rebase and post an updated branch soon.
Thanks! I should have time to review and test this weekend.
> I will also generally be available to fix any bugs although will be
> offline for a few days at a time here and there for travel.
>
> If you would prefer, I could put the bus aliases feature behind a flag
> so that it is effectively disabled, and then bring it back with the new
> file format. I'm not sure whether or not that would be easier than
> adding the field to the old format before you start work on the new format.
I appreciate the offer but I don't think this will be necessary. It's
going to be a while before I get around to coding the schematic file
format. It will give users a chance to test the new feature and get it
stabilized before I merge it into the new file format. I have a bunch
of under the hood stuff to change (units and inheritance) and the new
symbol library file format before I start on the new schematic file format.
>
> -Jon
>
> On Mon, Mar 11, 2019 at 8:54 AM Wayne Stambaugh <stambaughw@xxxxxxxxx
> <mailto:stambaughw@xxxxxxxxx>> wrote:
>
> Hey Jon,
>
> On 3/9/2019 5:58 PM, Jon Evans wrote:
> > Hi Wayne and the rest of the team,
> >
> > My code is located here:
> > https://github.com/craftyjon/kicad/tree/bus_upgrades
> > (I can rebase/format this as a patchset to make review easier if
> needed)
>
> Please rebase it when you get a chance. It certainly will be easier to
> review and merge when it's rebased against the latest changes in the dev
> branch.
>
> >
> > Documentation updates are in this branch:
> > https://github.com/craftyjon/kicad-doc/tree/bus_upgrades
> >
> > Unfortunately, I've been very busy in the past few months and have not
> > had time to perform regular testing of my branch beyond checking
> that it
> > compiles as I merge upstream changes into it.
> > Since the branch has been feature complete for some time now, I would
> > not be terribly surprised if a bug or two has crept in due to the rest
> > of the code moving forward.
>
> Once I merge this, will you be available to fix bugs as the pop up?
> Until the rest of the team understands your code, you will be the best
> candidate to get bugs fixed quickly.
>
> >
> > Please be aware that this branch contains an entirely new netlist
> > generator in order to support the new features.
> > This is exciting for the speed and feature improvements it makes
> > possible, but scary because of the consequences of getting
> anything wrong!
> > I have put in place a quality control check
> > (see NETLIST_EXPORTER_KICAD::WriteNetlist) that attempts to catch any
> > corner cases that I have not found already where the new algorithm is
> > inconsistent from the old, but there is always room for error here.
> > My thoughts were to keep in this code in master for some period of
> time
> > after merge, and then disable it or put it behind some flag after we
> > have more confidence in the new algorithm. I welcome other
> suggestions
> > here.
> > I would like it to get more visibility and testing so that any defects
> > can be corrected before merge, so that people who run nightly builds
> > don't suffer unnecessarily.
>
> I will build and test your code as soon as you get it rebased. If any
> of the other devs have time to test this, I would appreciate and extra
> set of eyes on this code. It has the potential to be really disruptive
> so the more testing we can get up front, the better.
>
> > The new netlist exporter has also only been implemented for the KiCad
> > netlist format (not OrCad / CadStar / PSpice) as I wanted to get
> > review/approval of the new system before converting over the other
> > exporters.
> >
> > It's also worth noting that one of the new features does introduce a
> > schematic file format addition (bus aliases).
> > It would be possible to rip out this portion of the changes and
> stage it
> > for later merge if that were desirable.
>
> I forgot about the bus aliases changes. I really wanted to avoid making
> changes to the existing schematic file format if possible. Given that
> your work is done and I haven't even started working on the new file
> format code, I'm willing to accept this change and update the new
> schematic file format accordingly.
>
> >
> > Best,
> > Jon
> >
> > On Sat, Mar 9, 2019 at 2:42 PM jp charras <jp.charras@xxxxxxxxxx
> <mailto:jp.charras@xxxxxxxxxx>
> > <mailto:jp.charras@xxxxxxxxxx <mailto:jp.charras@xxxxxxxxxx>>> wrote:
> >
> > Le 09/03/2019 à 19:03, Wayne Stambaugh a écrit :
> > > Rather than try to figure out every possible merge
> combination, I'm
> > > going to prioritize things serially per editor. The highest
> priority
> > > are changes those that will or potentially impact later
> features.
> > >
> > > Jon's netlist work would be the obvious candidate for the
> schematic
> > > editor. Jon, please post the url of your git repo so we can
> > review the
> > > your changes.
> > >
> > > JP, don't you have some new pad work queued up? I would
> think this
> > > would impact things like Tom's router improvements. If so,
> then this
> > > should be the first board editor change that gets merged. I
> would
> > like
> > > to take a look at the changes before we merge this.
> > >
> > > Once things stabilize, I will open up the next two feature
> merges.
> > > Everyone please take the time to review these merges when
> you get
> > a chance.
> > >
> > > Thanks
> > >
> > > Wayne
> > >
> >
> > Attached, patches for chamfered pads and grid shaped zones.
> >
> >
> > --
> > Jean-Pierre CHARRAS
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