kicad-developers team mailing list archive

[Lorenzo Marcantonio <l.marcantonio@xxxxxxxxxxxx>]

On Tue, Apr 22, 2014 at 07:50:42PM +0200, jp charras wrote:

> Please, think in logical units, not in mils.

You are both right, in a sense :D

The confusion stems from the IEC 'module' being 2 LU big.

In a typical 8-pin symbol (like a 555) centering at minimum pitch needs
a coordinate of ±0.5 modules, i.e. 1 LU. However the IEC is stated in
terms of sizes, not positions: in fact the origin, as stated in the
annex A of 60617-1 is not defined; it only has to fall on the grid,
which has a pitch of 0.5 modules (i.e. 1 LU).

Pins   Y coord. in LU

o---  -3
      -2
o---  -1          - 
       0 Origin    | 1 module i.e. 2 LU 
o---   1          - 
       2
o---   3

Giving than a LU is 50 mils = 1.27 mm, we have a module of 
100 mils = 2.54 mm which for all practical purposes is the IEC module of
2.5 mm. 

Coordinates (in mils) are -0.15, -0.05, 0.05, 0.15; wiring spacing is
1 module (which is quite small, but I prefer A3 sized drawings). Anyway
since text is 50 mil (1 LU) there is no risk in confusing labels or
such.

At the end, everybody is happy :D

In short, citing 60617-1 (hope they don't sue me:D I'm translating from
the italian version so it's not word-by-word exact)

- Symbols are built on a grid with pitch M. The module of 2.5 mm is *not
  mandatory* (emphasis mine).

- Connection lines lie on grid lines and ends on grid nodes.

- Rectangle's sides and circle's diameters are multiple of 2M. For
  smaller symbols dimensions of 1.5M, 1M and 0.5M are used.

- At least 2M should be kept between connection lines. Yes, the previous
  example is *not conforming*, since pins are only 1M spaced. However
  seems to be accepted. The trick is simply that 50 mil text is 0.5M,
  so it's the text which is not conforming, in fact...

- For automatic systems the origin point must (or should? in italian
  it's difficult to distinguish) lie on a grid node. (the examples put
  the origin in the lower left corner)

To 'fix' the symbol above, it should be done in this way:

Pins   Y coord. in LU

o---  -6
      -5
      -4
      -3
o---  -2            
      -1          - 
       0 Origin    | 1 module i.e. 2 LU 
       1          - 
o---   2            
       3
       4
       5
o---   6

That's 5 mm between each pin. A little border and our 555 becomes 2 cm
tall, not too bad. A 200-pin FPGA however *could* use the smaller pitch.

So using the LU of 50 mils and the IEC module of 100 mils/2 LU seems
quite good to me.

Oh, BTW the same reasoning is behind the rounding of pad position to
0.05 mm and pad sizes to 0.1 mm in the IPC standards (the edges always
falls on the grid).

-- 
Lorenzo Marcantonio
Logos Srl