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Re: Library Convention

 

> I don't remember a rule on pin length, however these values seems reasonable
to me. 150 mil often happens for rounding the edges to the grid, too.

Actually I didn't take the pin length from the standard, it's a mistake. I
simply want to ensure the part width is a multiple of LUs.

> Ah, we switched to PCB modules...

Yes, obviously the rules will be separated in the corresponding sections in
the complete version. We however also have to discuss pin placement on
symbols, especially the black-box ones. What do the standards say about it?

> Maybe we have a different idea of numbering quadrants:P The usual definition
(from trigonometry) is this:

Yeah I was thinking about tape and reel quadrant designations from some
manufacturers, Maxim for example:
http://www.maximintegrated.com/design/packaging/smd_tape_reel.cfm

Left, right, top and bottom will definitely be simpler for everyone.

So here is another iteration:

-Using a 100mil grid, pin ends and origin must lie on grid nodes (IEC-60617)
-Pin must have a length of 100, or 150mil if number needs more space
---
-Pin 1 must be on the left first, then at the top, except at the top for
PLCC. (IPC-7351)
-Origin is placed in the middle with respect to device lead ends
(IEC-61188-7)

On Sat, Apr 26, 2014 at 11:01 PM, Lorenzo Marcantonio <
l.marcantonio@xxxxxxxxxxxx> wrote:

> On Sat, Apr 26, 2014 at 09:55:06PM -0400, Carl Poirier wrote:
> > I originally thought the libraries were concerned when it came to units
> in
> > eeschema. Thanks for the clarifications. So, why can't a 2.5mm grid be
> > added, in the end?
>
> Mostly because eeschema works in decimils and there would be rounding
> issues.
>
> Other than that because AFAIK the road map already calls for logical
> units.
>
> > Which one is used more widely? IPC-7351 Level A (pin one upper left) or
> > IEC-61188-7 (lower left) ?
>
> Most of the wizards in other EDA packages build components using the IPC
> rules.
>
> > -Using a 100mil grid, pin ends and origin must lie on grid nodes
> (IEC-60617)
>
> You have an ugly situation centering even-sided parts, but the idea is
> that, yes. I position on 50mil but keep the distance at multiple of
> 100mils, as explained before. Just move the origin to fix it (and break
> all the existing schematics:D)
>
> > -Pin must have a length of 100, or 150mil if number needs more space
> > (IEC-60617)
>
> I don't remember a rule on pin length, however these values seems
> reasonable to me. 150 mil often happens for rounding the edges to the
> grid, too.
>
> > -Pin 1 must be in quadrant 1 (IPC-7351), if not possible quadrant 3 (
> > IEC-61188-7)
>
> Ah, we switched to PCB modules...
>
> Maybe we have a different idea of numbering quadrants:P The usual
> definition (from trigonometry) is this:
>
>     T
>   2 | 1
> L---+---R
>   3 | 4
>     B
>
> Left, right, top, bottom are the terms used by IPC.
> The IPC rules for SMD zero orientation are these:
>
>                         Pin 1
> - Chip components       Left (1 is + in general, 1 is K for diodes)
>   Molded capacitors
>   Molded inductors
>   Alu capacitors
>   (two pins components in general)
>
> - SOT, TO, SOIC, TSSOP  Upper-Left (quadrant 2)
>   Chip arrays
>   (two sides of pin components in general,
>    so DFN, SON, JSOP, CFP and so on, too)
>
> - QFP, BQFP, CQFP, QFN  Upper-Left (quadrant 2)
>   (four sides of pin, with number 1 on a corner)
>
> - PLCC, LCC             Top-Center
>   (four sides of pins, number on on center side)
>
> - BGA, LGA              A1 on Upper-Left
>   (area pin array)
>
> So 99% of the origin is in quadrant 2 or on the left side (you don't see
> a lot of PLCCs these days)
>
> >  -Origin is placed in the middle with respect to device leads
> (IEC-61188-7)
>
> Yes, to be exact the middle with respect to the outer boundary of the
> device leads (because otherwise the sink on the DPAKs can give the wrong
> solution).
>
> For, ahem, legacy reason (I liked them better) I have the two-sided
> component with pin 1 on lower left, by the way. You'll have to turn them
> to get to the standard orientation.
>
>
> --
> Lorenzo Marcantonio
> Logos Srl
>
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