kicad-developers team mailing list archive

[Lorenzo Marcantonio <l.marcantonio@xxxxxxxxxxxx>]

On Sun, Apr 27, 2014 at 03:38:53PM -0400, Carl Poirier wrote:
> Yes, obviously the rules will be separated in the corresponding sections in
> the complete version. We however also have to discuss pin placement on
> symbols, especially the black-box ones. What do the standards say about it?

Not much, actually... the 60617-1 only says that connections should end
on grid intersections and must have sufficient space for lettering (I've
already said enough on that).

Most of the symbols have their natural attach point (it's clear where
BCE have to be connected on a BJT...), most of the 'square' or 'circle'
symbol can be connected in a near arbitrary way; example, the motor:
  __
 /  \
| M= |  << this is a DC motor, it's a circle :D
 \__/      there is a + marking on the relevant terminal

All of the following are valid symbols (of course lettering can be
vertical, too):

  |_         __           __     
 /+ \       /  \         / +\--  
| M= |   --| M=+|--     | M= |   
 \__/       \__/         \__/--  
  |

Side note: 60617 deals and unifies with both electronic and
electrotechnical (wiring, distribution and so on) schematic. In many
places however there are different conventions. The most obvious is the
unifilar wiring, like for 3-phase wiring and cable bundling (obviously
can't be used for netlisting). The commonly used 'bus' tapping symbology
(used by kicad, too) isn't part of the standard, either. I use eeschema
for both and the result is fine (I even do ladders and block diagrams
with it, actually:P). There are also some esoteric symbols which are
almost never used (Hg delay lines and ferrite core memories, how many do
you use at year?) and other which are usually ignored (the static
switch, for example... most of the time you use the relevant
optocoupling block or the usual relay symbol).

The other place where pin placement *is* significant is in the -12 and
-13 sections, dealing respectively with binary and logical 'black
boxes'. I deeply hate them, because they are ugly and not easily
recognizable. Also you *need* the Technical Set for lettering them, it's
not an option here.

For people not knowing them, this is the beloved ANSI 'and' block:
    ____
---|    \   (< semicircle here)
   |     |---
---|____/

This is the IEEE/IEC corresponding symbol:
    _____
   |  &  |
---|     |---
   |     |
---|     |
   |_____|

If that wasn't ugly enough, here is the opamp (I assume everyone knows
the usual triangle block)

    _____
   | |>oo|    (< these would be a right pointing triangle with the
---|+    |---  infinity symbol for gain)
   |     |
---|-    |
   |_____|

Now imagine a mixed signal circuit and look for the whole day to all
these identical boxes... at least *there is* a redeeming point with new
symbols, since they distinguish comparators and the kind of output
(push-pull, tristate, and so on). Here is an analog pull-down comparator
(like the LM319):

    ________
   | UCOMP  |    The * is the pull-down symbol, made in this way:
---|X  X>Y *|--- (from the technical set, too)            /\
   |        |                                             \/
---|Y       |                                             --
   |________|

By the way all these symbol are somewhere hidden in Unicode (some in the
graphic block, some in the greek block, some in the misc technical
block, some in the math block)

If it wasn't clear yet the rule is: stuff enters from the left 
and exits from the right. Of course you can rotate the symbol (but
mirroring is not recommended).

Last rule for pin placement: common/control inputs and common outputs.
You add the 'hat' for the first and a separate section for the others.
More or less like UML classes... for an example look at the NXP 74HCT153
datasheet.

> Yeah I was thinking about tape and reel quadrant designations from some
> manufacturers, Maxim for example:
> http://www.maximintegrated.com/design/packaging/smd_tape_reel.cfm

Probably that's the EIA 481 designation. Never cared for that, the
slaves at the pick and place machines have to deal with it :P

> Left, right, top and bottom will definitely be simpler for everyone.

Most probably for the same reason, to avoid confusion (like the
red/green convention for lamps: usually green is OK and red is fault; in
power distribution red is OK, but is red because the line is live i.e.
dangerous)

> So here is another iteration:
> 
> -Using a 100mil grid, pin ends and origin must lie on grid nodes (IEC-60617)
> -Pin must have a length of 100, or 150mil if number needs more space

Make it 'or more' since with 3 figures 150mil is barely enough. If you
need to round up to the grid 200mil become necessary

> -Pin 1 must be on the left first, then at the top, except at the top for
> PLCC. (IPC-7351)

More or less, yes. IPC simply tabulates all the component types; that
part of the standard is actually public here:
http://ohm.bu.edu/~pbohn/__Engineering_Reference/pcb_layout/pcbmatrix/Component%20Zero%20Orientations%20for%20CAD%20Libraries.pdf

> -Origin is placed in the middle with respect to device lead ends
> (IEC-61188-7)

Yes, IPC too.

-- 
Lorenzo Marcantonio
Logos Srl