kicad-developers team mailing list archive

[Wayne Stambaugh <stambaughw@xxxxxxxxx>]

Steven,

On 4/28/2018 11:10 PM, Strontium wrote:
> Wayne,
> 
> I think it is an acceptable solution for V5 because this shouldn't get
> in the way of a V5 release.
> 
> For V6, would it be feasible to define 0.000001/0.00001% to be a special
> value (like zero) which means "effectively zero" and then the pad gui
> can be updated with this special knowledge so that users don't look at a
> pad and say "Why is this set to 0.000001??" and then change it thinking
> its a rounding error or something.
> 
> I am not a fan of coded values in gui's because the whole idea of a gui
> is to abstract the implementation details into something human friendly.
> And 0 meaning "inherit", and 0.000001 meaning "effectively zero" is an
> implementation issue and not something the user should have to know or
> think about.

I would rather not use magic values.  They make the file format less
human readable which is a design goal with any kicad format.  The person
reading the file would have to know that 0.000001/0.00001% meant do not
apply clearance and/or ratio to the pad.  I would rather use a flag such
as no_clearance and/or no_ratio to ignore the normal priority.  This
makes it clear that that clearance and/or ratio calculations do not get
applied to the pad .

> 
> Actually, it would be nice in the pad gui, if it IS set to inherit that
> the field display a READ ONLY value that would be used NOW based on the
> current global/parent settings, and which is it (a global value or a
> parent value).
> 
> Steven
> 
> 
> On 28/04/18 23:35, Wayne Stambaugh wrote:
>> Just to be clear, the library developers are asking for the ability to
>> ignore clearance and ratio settings when creating solder mask and
>> solder paste only pads.  If this is the case, it will require a board
>> file format change to add a flag to ignore the global and footprint
>> level settings.  I would be opposed to changing the code to just
>> assume that if it's a solder mask or solder paste only pad that no
>> tolerance or ratio is applied.  This would break an existing pads
>> defined this way and silently change existing boards.  Given that we
>> are deep into feature freeze, the least painful solution would be to
>> set the tolerance to 1nm and the ratio (as JP suggested) to 0.00001%
>> for the footprints that need to maintain the dimensions of solder mask
>> and solder paste only boards.  The change to the overall pad
>> dimensions using this method would be far below any board
>> manufacturer's tolerance capabilities.  Is this not an acceptable
>> solution?
>>
>> Cheers,
>>
>> Wayne
>>
>> On 04/28/2018 08:44 AM, Eeli Kaikkonen wrote:
>>>
>>>
>>> 2018-04-28 15:04 GMT+03:00 Rene Pöschl <poeschlr@xxxxxxxxx
>>> <mailto:poeschlr@xxxxxxxxx>>:
>>>
>>>     The global settings here are less for ensuring correct alignment and
>>>     more for a global paste reduction.
>>>
>>>
>>> That's right, that's what I meant. In the example datasheet you have
>>> 0.05mm tolerance for the location of the mask in relation to the
>>> copper because. But making the mask openings larger or smaller by
>>> 0.05mm would be against the recommendation.
>>>
>>> It just doesn't make sense to apply global paste and solder mask
>>> clearance values to "pads" which don't have copper. The whole reason
>>> why non-copper pads can exist is that you need control over the size,
>>> shape and location of paste or mask, right? Changing the behavior
>>> could lead to problems but luckily the current behavior can be
>>> circumvented by adding to clearance fields a very small value which
>>> is negligible in practice.
>>>
>>> Eeli Kaikkonen
>>>
>>>
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>>
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> 
> 
> 
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