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Re: Via Stitching

 

Hi

I add netnames to stitch vias.


Regards


Heikki

https://youtu.be/7FgmY8Uzgbg


On Wed, Dec 21, 2016 at 3:15 PM, Heikki Pulkkinen <hei6mail@xxxxxxxxx>
wrote:

> Hi Wayne and others,
>
> It has been for a while. I was out of my faster computer again. Mother
> board has to been put oven again.
> I think, that my suggestion of via stitching is now quite robust. But it
> has to be tested more and some other than me. Main idea has developed so,
> that VIA class has new property of that stitching and it has to be saved on
> [.kicad_pcb] file too. Filling pours is part of that how to connect vias
> and pours, so it has to be done twice. And there is some new additions in
> shape_poly_set.cpp and drc.cpp. They do not disturb other program. And of
> course I have to add some little things in gal canvas too. I did not make
> any class of stitching, just put them in own namespace, because there is no
> data to hide. All stitch data is in VIA class. So, hope that my idea is
> usable and it is worth of improve.
>
> Regards
>
> Heikki
>
> On Sun, Nov 13, 2016 at 8:03 PM, Wayne Stambaugh <stambaughw@xxxxxxxxx>
> wrote:
>
>> Hi Heikki,
>>
>> I appreciate any effort that you can make on this.  I really would like
>> to get the via stitching code in before the stable version 5 pre release
>> which I'm hoping to do at the beginning of 2017 before FOSDEM.
>>
>> Cheers,
>>
>> Wayne
>>
>>
>> On 11/12/2016 12:35 PM, Heikki Pulkkinen wrote:
>> > Hi Wayne,
>> >
>> > OK, I understand that.  I look what can I do, but I do not promise
>> > anything, very soon anyway. I am not familiar with gal canvas. I done
>> > this to legacy canvas, because I know how it works. Now stitching works
>> > in my tests quite well "of course". And it is working my needs.
>> >
>> >  I try via stitching on gal, and it is partly working. Stitch via
>> > placing and chain connection does not seems to work. But converting old
>> > designs with pad->track->via... chain removing pad connection from chain
>> > converts vias as stitch vias when run track via cleanup.
>> >
>> > I do some code cleaning and send it to look at as soon as possible. You
>> > can use it or not, It is fine for me.
>> >
>> >
>> > Regards
>> >
>> > Heikki
>> >
>> >
>> > On Fri, Nov 11, 2016 at 10:16 PM, Wayne Stambaugh <stambaughw@xxxxxxxxx
>> > <mailto:stambaughw@xxxxxxxxx>> wrote:
>> >
>> >     Hi Heikki,
>> >
>> >     I spoke to Tom this morning about your via stitching work.  He
>> mentioned
>> >     that your via stitching work should be developed for the gal canvas.
>> >     I'm not sure you are aware but I put a moratorium on adding new
>> features
>> >     to the legacy canvas earlier in the year.  This is because the
>> legacy
>> >     canvas is going to be removed at some time in the not too distant
>> >     future.  I should have mentioned this sooner but it really needs to
>> be
>> >     done this way to be accepted into kicad.  I realize this is going
>> to be
>> >     more work for you but it would have to be done anyway.  If you
>> support
>> >     both canvases, I'm fine with that but the gal canvas must be
>> supported
>> >     for any new feature added to pcbnew.
>> >
>> >     Thanks,
>> >
>> >     Wayne
>> >
>> >
>> >     On 11/8/2016 3:35 AM, Heikki Pulkkinen wrote:
>> >     > Hi
>> >     >
>> >     > Now via->pour chain is recovering.
>> >     >
>> >     > Heikki
>> >     >
>> >     > https://youtu.be/HuViOfQmcrU
>> >     >
>> >     >
>> >     > On Mon, Nov 7, 2016 at 1:26 PM, Heikki Pulkkinen <
>> hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>
>> >     > <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>> wrote:
>> >     >
>> >     >     Hi,
>> >     >
>> >     >     I made some new features. Now it is possible chaining copper
>> pours
>> >     >     with Vias. This video show, how it works at the moment.
>> >     >
>> >     >
>> >     >     Heikki
>> >     >
>> >     >     https://youtu.be/91tT626XnbM
>> >     >
>> >     >     On Sat, Oct 29, 2016 at 7:58 AM, Heikki Pulkkinen
>> >     >     <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>> wrote:
>> >     >
>> >     >         Hi Wayne,
>> >     >
>> >     >         I think that there is two places when user is "wrong" wit
>> >     >         his/her will. One is when there are not at least two
>> pours to
>> >     >         connect with and second is that there must be at least
>> one pad
>> >     >         in connection chain. If antennas are user will, it is
>> better
>> >     >         create component. I might be wrong, but that is how I
>> think it.
>> >     >         I did some experimental development in my code which now
>> keeps
>> >     >         vias netcodes Steven's ideas way, and take care of that
>> there is
>> >     >         connected pad. These two videos show how that works. I
>> try more
>> >     >         other things when I am back home again.
>> >     >
>> >     >         Regards
>> >     >
>> >     >         Heikki
>> >     >
>> >     >         https://youtu.be/wXdVl4WXCJ8
>> >     >         https://youtu.be/5qe-XnVJwXs
>> >     >
>> >     >
>> >     >         27.10.2016 1.47 "Wayne Stambaugh" <stambaughw@xxxxxxxxx
>> <mailto:stambaughw@xxxxxxxxx>
>> >     >         <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>>> kirjoitti:
>> >     >
>> >     >             I'm just not comfortable with the connection algorithm
>> >     >             reassigning via
>> >     >             net codes to a zone's net code based on the zone/via
>> >     >             intersection.  This
>> >     >             puts the responsibility of the connection on the
>> project
>> >     >             rather than the
>> >     >             user.  I'm OK if we suggest a net when the user is
>> placing
>> >     >             vias but the
>> >     >             user has the final say and the via net code does not
>> >     change
>> >     >             unless the
>> >     >             user explicitly changes it.  I don't now how to make
>> >     it any
>> >     >             clearer than
>> >     >             that.  Someone would have to make a really impressive
>> >     >             argument (read
>> >     >             doctoral thesis) as to why we should allow kicad to
>> >     determine
>> >     >             connectivity rather than the user.
>> >     >
>> >     >             On 10/25/2016 1:54 AM, Heikki Pulkkinen wrote:
>> >     >             > Thanks Wayne to look at this and Steven for asking
>> about
>> >     >             connection logic.
>> >     >             >
>> >     >             > It is good to try explain what did you thought  last
>> >     >             summer. It clearer
>> >     >             > things.
>> >     >             >
>> >     >             > There are main rule which connects top and bottom
>> layer
>> >     >             and second rule
>> >     >             > connecting inner layers. And now I think that main
>> >     rule is
>> >     >             useless,
>> >     >             > because second rule do all this connecting via to
>> first
>> >     >             two zones with
>> >     >             > same netcode. This works well as far as zones are
>> up the
>> >     >             date. And that
>> >     >             > is not always true. For example in DRC, if you
>> forgot to
>> >     >             refill zones
>> >     >             > before running DRC, vias can corrupted to wrong net.
>> >     Thats
>> >     >             why running
>> >     >             > first refilling zones in DRC, keeps vias right
>> >     connected.
>> >     >             > I found two another, and there might be more,
>> situation
>> >     >             when user can
>> >     >             > accidentally damage connection. Cleanup and saving a
>> >     >             board. Saving is
>> >     >             > not that broblem, but opening is. But I have
>> solution of
>> >     >             them. Just
>> >     >             > running zone filling algorithm before running
>> ratsnest
>> >     >             algorithm.
>> >     >             > But usually, when working with via stitching, user
>> keeps
>> >     >             zones up to
>> >     >             > date running refill to see what he or she have
>> done. I
>> >     >             know there is
>> >     >             > always better solutions, but I can manage this at
>> the
>> >     >             moment before
>> >     >             > there are  official one. I know, if algorithm is
>> >     different
>> >     >             than mine it
>> >     >             > does not ruin my designs.
>> >     >             >
>> >     >             > Cheers
>> >     >             >
>> >     >             > Heikki
>> >     >             >
>> >     >             >
>> >     >             > 24.10.2016 23.58 "Wayne Stambaugh"
>> >     <stambaughw@xxxxxxxxx <mailto:stambaughw@xxxxxxxxx>
>> >     >             <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>>
>> >     >             > <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>
>> >     >             <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>>>> kirjoitti:
>> >     >             >
>> >     >             >     I finally had a chance to look at this patch
>> and I
>> >     >             have similar
>> >     >             >     concerns.  I thought I was pretty clear about
>> *not*
>> >     >             being comfortable
>> >     >             >     with making assumptions about via zone
>> >     connections and
>> >     >             always using the
>> >     >             >     assigned net code.  I'm a bit concerned with the
>> >     >             connection testing and
>> >     >             >     it's decision to change a via's net code
>> >     depending on
>> >     >             which zone(s) that
>> >     >             >     it intersects.  I see this as an unacceptable
>> >     risk for
>> >     >             kicad to assume.
>> >     >             >     I would rather put the responsibility in hands
>> >     of the
>> >     >             user and just have
>> >     >             >     kicad complain when there is a drc issue.
>> >     >             >
>> >     >             >     Please configure your editor to clean up
>> trailing
>> >     >             white space and fix
>> >     >             >     the other coding policy errors.
>> >     >             >
>> >     >             >     Cheers,
>> >     >             >
>> >     >             >     Wayne
>> >     >             >
>> >     >             >     On 10/23/2016 10:44 PM, Strontium wrote:
>> >     >             >     > Hello Heikki,
>> >     >             >     >
>> >     >             >     > Can you explain the logic you are using to
>> >     determine
>> >     >             the net of
>> >     >             >     the vias
>> >     >             >     > during DRC reconnect?  It looks like you are
>> only
>> >     >             considering the top
>> >     >             >     > and bottom layer, but stitching vias may be
>> >     >             stitching internal layers?
>> >     >             >     >
>> >     >             >     > Steven
>> >     >             >     >
>> >     >             >     >
>> >     >             >     > On 23/10/16 21:48, Heikki Pulkkinen wrote:
>> >     >             >     >> Hi Wayne and all,
>> >     >             >     >>
>> >     >             >     >> About that my suggestion of Via Stitching. I
>> do
>> >     >             some tests and found
>> >     >             >     >> that if DRC first fill zones and then do
>> tests it
>> >     >             does not break
>> >     >             >     >> anything. if you forgot to Fill or Refill
>> zoenes
>> >     >             before running DRC.
>> >     >             >     >>
>> >     >             >     >> Regards
>> >     >             >     >>
>> >     >             >     >> Heikki
>> >     >             >     >>
>> >     >             >     >>
>> >     >             >     >> On Fri, Oct 21, 2016 at 6:41 PM, Heikki
>> Pulkkinen
>> >     >             >     <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>>
>> >     >             >     >> <mailto:hei6mail@xxxxxxxxx <mailto:
>> hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>>>> wrote:
>> >     >             >     >>
>> >     >             >     >>     Hi Wayne,
>> >     >             >     >>
>> >     >             >     >>     If you try this, I send the last full
>> >     patch of
>> >     >             that Via
>> >     >             >     Stitching.
>> >     >             >     >>     Do not care other patches in mailing
>> >     list, they
>> >     >             are more or less
>> >     >             >     >>     incomplete.
>> >     >             >     >>
>> >     >             >     >>     Regards
>> >     >             >     >>
>> >     >             >     >>     Heikki
>> >     >             >     >>
>> >     >             >     >>     On Tue, Oct 18, 2016 at 3:22 PM, Wayne
>> >     Stambaugh
>> >     >             >     >>     <stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>
>> >     >             <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>> <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>
>> >     >             <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>>>
>> >     >             >     <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>
>> >     >             <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>> <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>
>> >     >             <mailto:stambaughw@xxxxxxxxx
>> >     <mailto:stambaughw@xxxxxxxxx>>>>> wrote:
>> >     >             >     >>
>> >     >             >     >>         I will look at when I get a chance.
>> When
>> >     >             that will be I
>> >     >             >     >>         cannot say for
>> >     >             >     >>         sure.  I've just been really busy.  I
>> >     will
>> >     >             try to get around
>> >     >             >     >>         to it this
>> >     >             >     >>         weekend.
>> >     >             >     >>
>> >     >             >     >>         Cheers,
>> >     >             >     >>
>> >     >             >     >>         Wayne
>> >     >             >     >>
>> >     >             >     >>         On 10/17/2016 3:40 PM, Jakub Kozdon
>> >     wrote:
>> >     >             >     >>         > Hi, it looks usable.
>> >     >             >     >>         >
>> >     >             >     >>         > Don't know if it is visible for
>> >     all, but
>> >     >             Wayne, what do you
>> >     >             >     >>         think about it?
>> >     >             >     >>         >
>> >     >             >     >>         > Jakub
>> >     >             >     >>         >
>> >     >             >     >>         > Dne 16.10.2016 v 19:23 Heikki
>> Pulkkinen
>> >     >             napsal(a):
>> >     >             >     >>         >> Hi,
>> >     >             >     >>         >>
>> >     >             >     >>         >> I add array feature to my Via
>> >     Stitching.
>> >     >             And an another
>> >     >             >     >>         slowly video
>> >     >             >     >>         >> to watch.
>> >     >             >     >>         >> https://youtu.be/28nfoZPg2bg
>> >     >             >     >>         >>
>> >     >             >     >>         >> Full fixed patch and array test
>> patch.
>> >     >             More work have
>> >     >             >     to be
>> >     >             >     >>         done, but
>> >     >             >     >>         >> this was easy start.
>> >     >             >     >>         >>
>> >     >             >     >>         >> Regards
>> >     >             >     >>         >>
>> >     >             >     >>         >> Heikki
>> >     >             >     >>         >>
>> >     >             >     >>         >> On Thu, Oct 13, 2016 at 7:23 PM,
>> >     Heikki
>> >     >             Pulkkinen
>> >     >             >     >>         <hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>>>
>> >     >             >     >>         >> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>>>>>
>> >     >             wrote:
>> >     >             >     >>         >>
>> >     >             >     >>         >>     Hi,
>> >     >             >     >>         >>
>> >     >             >     >>         >>     Here is demovideo about via
>> >     >             stitching. It is slowly,
>> >     >             >     >>         because of
>> >     >             >     >>         >>     slowly machine. I do some
>> >     >             development too, so full
>> >     >             >     patch is
>> >     >             >     >>         >>     attached too.
>> >     >             >     >>         >>
>> >     >             >     >>         >>     On Tue, Oct 11, 2016 at 5:49
>> PM,
>> >     >             Marcos Chaparro
>> >     >             >     >>         >>     <nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>
>> >     >             <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>>
>> >     >             >     <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>
>> >     >             <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>>> <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>
>> >     >             <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>>
>> >     >             >     <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>
>> >     >             <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>>>>
>> >     >             >     >>         <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>
>> >     >             <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>>
>> >     >             >     <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>
>> >     >             <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>>> <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>
>> >     >             <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>>
>> >     >             >     <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>
>> >     >             <mailto:nitrousnrg@xxxxxxxxx
>> >     <mailto:nitrousnrg@xxxxxxxxx>>>>>>
>> >     >             >     >>         wrote:
>> >     >             >     >>         >>
>> >     >             >     >>         >>         Hi Heikki,
>> >     >             >     >>         >>         is there any chance to
>> >     make some
>> >     >             screenshots or
>> >     >             >     >>         video about
>> >     >             >     >>         >>         this? Some of us do
>> compile
>> >     >             kicad to get the
>> >     >             >     latest and
>> >     >             >     >>         >>         greatest but never
>> applied a
>> >     >             patch for a
>> >     >             >     particular
>> >     >             >     >>         feature.
>> >     >             >     >>         >>
>> >     >             >     >>         >>         Regards
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>         Marcos
>> >     >             >     >>         >>
>> >     >             >     >>         >>         On Sat, Oct 8, 2016 at
>> >     7:04 AM,
>> >     >             Heikki Pulkkinen
>> >     >             >     >>         >>         <hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>>>
>> >     >             >     >>         <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>>>>>
>> >     >             wrote:
>> >     >             >     >>         >>
>> >     >             >     >>         >>             Hi,
>> >     >             >     >>         >>
>> >     >             >     >>         >>             Putting back that my
>> via
>> >     >             stitching tool to
>> >     >             >     >>         routing tool.
>> >     >             >     >>         >>             It is better that
>> way, I
>> >     >             think. All via tools
>> >     >             >     >>         are in same
>> >     >             >     >>         >>             place, and it adds
>> vias to
>> >     >             pours only from
>> >     >             >     hotkeys.
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>             On Sun, Oct 2, 2016 at
>> >     12:28
>> >     >             PM, Heikki
>> >     >             >     Pulkkinen
>> >     >             >     >>         >>             <hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>>>
>> >     >             >     >>         <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>>>>>
>> >     >             wrote:
>> >     >             >     >>         >>
>> >     >             >     >>         >>                 Hi,
>> >     >             >     >>         >>
>> >     >             >     >>         >>                 Finally Via
>> Stitching
>> >     >             without tracks is at
>> >     >             >     >>         zone tool.
>> >     >             >     >>         >>                 I tested it little
>> >     bit,
>> >     >             but more tests are
>> >     >             >     >>         needed.
>> >     >             >     >>         >>                 This patch
>> replace all
>> >     >             other patches. Do
>> >     >             >     >>         not use them,
>> >     >             >     >>         >>                 use only this
>> patch. I
>> >     >             think this is worth
>> >     >             >     >>         of try. I
>> >     >             >     >>         >>                 am going to use it
>> >     >             anyway, even if it do
>> >     >             >     >>         not get any
>> >     >             >     >>         >>                 acceptance. First
>> >     patch
>> >     >             is for Fedora
>> >     >             >     >>         users. It makes
>> >     >             >     >>         >>                 possible to build
>> >     Kicad
>> >     >             in Fedora release
>> >     >             >     >>         wxWidgets
>> >     >             >     >>         >>                 libs whitout
>> building
>> >     >             wxWidget from
>> >     >             >     source.
>> >     >             >     >>         I do not
>> >     >             >     >>         >>                 know has anybody
>> else
>> >     >             that problem,
>> >     >             >     but I had.
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>                 Heikki
>> >     >             >     >>         >>
>> >     >             >     >>         >>                 On Tue, Sep 27,
>> >     2016 at
>> >     >             6:46 PM, Heikki
>> >     >             >     >>         Pulkkinen
>> >     >             >     >>         >>
>> >      <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>>>
>> >     >             >     >>         <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>>>>>
>> >     >             wrote:
>> >     >             >     >>         >>
>> >     >             >     >>         >>                     Hi
>> >     >             >     >>         >>
>> >     >             >     >>         >>                     And I really
>> >     >             practice. I made
>> >     >             >     >>         improvement and
>> >     >             >     >>         >>                     forgot to copy
>> >     all.
>> >     >             So improvement is
>> >     >             >     >>         in these two
>> >     >             >     >>         >>                     patches. I
>> >     hope this
>> >     >             suggestion is
>> >     >             >     >>         accepted as a
>> >     >             >     >>         >>                     new feature.
>> >     >             >     >>         >>
>> >     >             >     >>         >>                     Heikki
>> >     >             >     >>         >>
>> >     >             >     >>         >>                     On Tue, Sep
>> >     27, 2016
>> >     >             at 2:31 PM,
>> >     >             >     Heikki
>> >     >             >     >>         Pulkkinen
>> >     >             >     >>         >>
>> >      <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>>
>> >     >             >     >>         <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>>>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>>
>> >     >             >     >>         <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>>>>>
>> >     >             >     >>         >>                     wrote:
>> >     >             >     >>         >>
>> >     >             >     >>         >>                         Hi,
>> >     >             >     >>         >>
>> >     >             >     >>         >>                         As in
>> >     practice,
>> >     >             I made a patch
>> >     >             >     >>         file of my
>> >     >             >     >>         >>                         changes
>> >     Not only
>> >     >             diifs. It is
>> >     >             >     >>         SHIFT-ALT-V
>> >     >             >     >>         >>                         hotkey
>> whitch
>> >     >             make buried and
>> >     >             >     blind
>> >     >             >     >>         vias, as
>> >     >             >     >>         >>                         it is in
>> >     routing
>> >     >             too.
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>                         Heikki
>> >     >             >     >>         >>
>> >     >             >     >>         >>                         On Sun,
>> >     Sep 25,
>> >     >             2016 at 2:25
>> >     >             >     PM, Heikki
>> >     >             >     >>         >>                         Pulkkinen
>> >     >             <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>>
>> >     >             >     >>         <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>>>
>> >     >             >     >>         >>
>> >     >              <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>>>>> wrote:
>> >     >             >     >>         >>
>> >     >             >     >>         >>                             Hi,
>> >     >             >     >>         >>
>> >     >             >     >>         >>                             I made
>> >     some
>> >     >             improvements to my
>> >     >             >     >>         patch of
>> >     >             >     >>         >>                             via
>> >     >             stitching. Now you can
>> >     >             >     just
>> >     >             >     >>         point
>> >     >             >     >>         >>                             copper
>> >     pour
>> >     >             place and press V,
>> >     >             >     >>         it make
>> >     >             >     >>         >>                             trough
>> >     via.
>> >     >             If you press
>> >     >             >     >>         SHIFT+CTRL+V it
>> >     >             >     >>         >>                             make
>> >     buried
>> >     >             or blind via.It
>> >     >             >     >>         does not
>> >     >             >     >>         >>                             change
>> >     >             working layer. Only
>> >     >             >     when
>> >     >             >     >>         you place
>> >     >             >     >>         >>
>>  buried or
>> >     >             blind via from
>> >     >             >     >>         different layer
>> >     >             >     >>         >>                             than
>> it's
>> >     >             layer pair is. I
>> >     >             >     >>         think that it
>> >     >             >     >>         >>                             is
>> quite
>> >     >             easy to shoot board
>> >     >             >     >>         full of
>> >     >             >     >>         >>                             copper
>> >     pours
>> >     >             connecting
>> >     >             >     vias. It is
>> >     >             >     >>         >>
>> >      possible to
>> >     >             remove connecting
>> >     >             >     >>         tracks from
>> >     >             >     >>         >>                             old
>> >     designs.
>> >     >             Just delete
>> >     >             >     >>         connection from
>> >     >             >     >>         >>                             pad
>> >     and use
>> >     >             clenup. Only have
>> >     >             >     >>         to remember
>> >     >             >     >>         >>                             that
>> if
>> >     >             there are not at least
>> >     >             >     >>         two copper
>> >     >             >     >>         >>                             pours
>> in
>> >     >             same netcode in
>> >     >             >     >>         different layers
>> >     >             >     >>         >>                             via is
>> >     >             deleted too. Any
>> >     >             >     support?
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>                             Heikki
>> >     >             >     >>         >>
>> >     >             >     >>         >>                             On
>> >     Sat, Sep
>> >     >             24, 2016 at 3:06
>> >     >             >     >>         PM, Heikki
>> >     >             >     >>         >>
>>  Pulkkinen
>> >     >             >     <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >
>> >     <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>>
>> >     >             >     >>         <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>>>
>> >     >             >     >>         >>
>> >     >              <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>> <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx
>> >>
>> >     >             >     <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>
>> >     >             <mailto:hei6mail@xxxxxxxxx
>> >     <mailto:hei6mail@xxxxxxxxx>>>>>> wrote:
>> >     >             >     >>         >>
>> >     >             >     >>         >>                                 Hi
>> >     >             everybody,
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >      This is
>> >     >             my suggestion to
>> >     >             >     >>         via stitching
>> >     >             >     >>         >>
>> >      without
>> >     >             any tracks. It
>> >     >             >     connects
>> >     >             >     >>         >>
>> >     >              unconnected vias in
>> >     >             >     >>         different copper
>> >     >             >     >>         >>
>>  pours
>> >     >             witch has same
>> >     >             >     >>         netcode. Adding
>> >     >             >     >>         >>
>> >      vias is
>> >     >             normal routing
>> >     >             >     >>         process without
>> >     >             >     >>         >>
>> >      routing
>> >     >             tracks. Start -
>> >     >             >     >>         Change Layer -
>> >     >             >     >>         >>
>>  End.
>> >     >             Tool that do
>> >     >             >     those things
>> >     >             >     >>         >>
>> >     >              automatically would be
>> >     >             >     >>         good, so you
>> >     >             >     >>         >>
>> >      can add
>> >     >             all vias in same
>> >     >             >     >>         layer. After
>> >     >             >     >>         >>
>>  adding
>> >     >             vias, run "Fill or
>> >     >             >     >>         Refill All
>> >     >             >     >>         >>
>>  Zones"
>> >     >             that "Clenup tracks
>> >     >             >     >>         and vias"
>> >     >             >     >>         >>
>>  do not
>> >     >             remove partly
>> >     >             >     >>         connected vias.
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>>  Heikki
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >      ______________________________
>> _________________
>> >     >             >     >>         >>             Mailing list:
>> >     >             >     >>
>> >      https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>
>> >     >             <https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>>
>> >     >             >     <https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>
>> >     >             <https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>>>
>> >     >             >     >>
>> >      <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>
>> >     >             >     <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>>>
>> >     >             >     >>         >>
>> >     >              <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>
>> >     >             >     <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>>
>> >     >             >     >>
>> >      <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>
>> >     >             >     <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>>>>
>> >     >             >     >>         >>             Post to     :
>> >     >             >     >>         kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
>> >     >             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>>
>> >     >             >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
>> >     >             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>>>
>> >     >             >     >>
>> >     >              <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
>> >     >             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>>
>> >     >             >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
>> >     >             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>>>>
>> >     >             >     >>         >>
>> >     >             >      <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
>> >     >             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>>
>> >     >             >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
>> >     >             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>>>
>> >     >             >     >>
>> >     >              <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
>> >     >             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>>
>> >     >             >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
>> >     >             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>>>>>
>> >     >             >     >>         >>             Unsubscribe :
>> >     >             >     >>
>> >      https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>
>> >     >             <https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>>
>> >     >             >     <https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>
>> >     >             <https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>>>
>> >     >             >     >>
>> >      <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>
>> >     >             >     <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>>>
>> >     >             >     >>         >>
>> >     >              <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>
>> >     >             >     <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>>
>> >     >             >     >>
>> >      <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>
>> >     >             >     <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>>>>
>> >     >             >     >>         >>             More help   :
>> >     >             >     >>         https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>
>> >     >             <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>>
>> >     >             >     <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>
>> >     >             <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>>>
>> >     >             >     >>         <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>
>> >     >             <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>>
>> >     >             >     <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>
>> >     >             <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>>>>
>> >     >             >     >>         >>
>> >     >              <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>
>> >     >             <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>>
>> >     >             >     <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>
>> >     >             <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>>>
>> >     >             >     >>         <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>
>> >     >             <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>>
>> >     >             >     <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>
>> >     >             <https://help.launchpad.net/ListHelp
>> >     <https://help.launchpad.net/ListHelp>>>>>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             >     >>         >>
>> >     >             _______________________________________________
>> >     >             >     >>         >> Mailing list:
>> >     >             https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>
>> >     >             <https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>>
>> >     >             >     <https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>
>> >     >             <https://launchpad.net/~kicad-developers
>> >     <https://launchpad.net/~kicad-developers>>>
>> >     >             >     >>
>> >      <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>
>> >     >             >     <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>
>> >     >             <https://launchpad.net/%7Ekicad-developers
>> >     <https://launchpad.net/%7Ekicad-developers>>>>
>> >     >             >     >>         >> Post to     :
>> >     >             kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
>> >     >             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >     <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>>
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>> ad.net
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>> >     >             >     <https://launchpad.net/~kicad-developers
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>
From de94258dfbd9429f547e61e8e2a0524d123701e1 Mon Sep 17 00:00:00 2001
From: heikki <hei6mail@xxxxxxxxx>
Date: Mon, 9 Jan 2017 16:53:46 +0200
Subject: [PATCH] Via Stitching
MIME-Version: 1.0
Content-Type: multipart/mixed; boundary="------------2.7.4"

This is a multi-part message in MIME format.
--------------2.7.4
Content-Type: text/plain; charset=UTF-8; format=fixed
Content-Transfer-Encoding: 8bit

---
 CMakeModules/FindwxWidgets.cmake           |   3 +-
 common/geometry/shape_poly_set.cpp         |  26 +++++++
 common/pcb.keywords                        |   3 +-
 include/geometry/shape_poly_set.h          |   3 +
 include/layers_id_colors_and_visibility.h  |   7 ++
 pcbnew/CMakeLists.txt                      |   1 +
 pcbnew/class_drc_item.cpp                  |   6 ++
 pcbnew/class_pcb_layer_widget.cpp          |   9 +++
 pcbnew/class_track.cpp                     |  14 +++-
 pcbnew/class_track.h                       |  23 ++++++
 pcbnew/clean.cpp                           |  28 ++++++-
 pcbnew/connect.cpp                         |  13 ++++
 pcbnew/drc.cpp                             |  22 +++---
 pcbnew/drc_marker_functions.cpp            |  27 +++++++
 pcbnew/drc_stuff.h                         |   4 +
 pcbnew/edit.cpp                            |   9 +++
 pcbnew/hotkeys_board_editor.cpp            |  11 ++-
 pcbnew/kicad_plugin.cpp                    |   3 +
 pcbnew/onrightclick.cpp                    |  18 +++++
 pcbnew/pcb_draw_panel_gal.cpp              |   7 +-
 pcbnew/pcb_painter.cpp                     | 115 ++++++++++++++++++++++-------
 pcbnew/pcb_painter.h                       |   4 +
 pcbnew/pcb_parser.cpp                      |  11 ++-
 pcbnew/pcbnew_id.h                         |   2 +
 pcbnew/router/pns_line_placer.cpp          |   7 ++
 pcbnew/router/pns_line_placer.h            |   3 +
 pcbnew/router/pns_placement_algo.h         |  10 +++
 pcbnew/router/pns_router.h                 |   6 +-
 pcbnew/router/router_tool.cpp              |   6 +-
 pcbnew/router/router_tool.h                |   2 +
 pcbnew/tools/common_actions.cpp            |  11 ++-
 pcbnew/tools/common_actions.h              |   2 +
 pcbnew/tools/pcb_editor_control.cpp        |  30 +++++++-
 pcbnew/tools/pcb_editor_control.h          |   2 +
 pcbnew/tools/pcbnew_control.cpp            |   2 +-
 pcbnew/zones_by_polygon_fill_functions.cpp |  51 ++++++++-----
 36 files changed, 434 insertions(+), 67 deletions(-)


--------------2.7.4
Content-Type: text/x-patch; name="0001-Via-Stitching.patch"
Content-Transfer-Encoding: 8bit
Content-Disposition: attachment; filename="0001-Via-Stitching.patch"

diff --git a/CMakeModules/FindwxWidgets.cmake b/CMakeModules/FindwxWidgets.cmake
index 9a6e56f..374f129 100644
--- a/CMakeModules/FindwxWidgets.cmake
+++ b/CMakeModules/FindwxWidgets.cmake
@@ -733,7 +733,8 @@ else()
     #-----------------------------------------------------------------
     # Support cross-compiling, only search in the target platform.
     find_program(wxWidgets_CONFIG_EXECUTABLE
-      NAMES wx-config wx-config-3.1 wx-config-3.0 wx-config-2.9 wx-config-2.8
+      #Fedora needs compat-wx* libs.
+      NAMES wx-config-3.0-gtk2 wx-config wx-config-3.1 wx-config-3.0 wx-config-2.9 wx-config-2.8
       DOC "Location of wxWidgets library configuration provider binary (wx-config)."
       ONLY_CMAKE_FIND_ROOT_PATH
       )
diff --git a/common/geometry/shape_poly_set.cpp b/common/geometry/shape_poly_set.cpp
index 287ebd6..b3d44b3 100644
--- a/common/geometry/shape_poly_set.cpp
+++ b/common/geometry/shape_poly_set.cpp
@@ -741,6 +741,32 @@ bool SHAPE_POLY_SET::Contains( const VECTOR2I& aP, int aSubpolyIndex ) const
 }
 
 
+const SHAPE_POLY_SET::POLYGON* SHAPE_POLY_SET::GetPolygon( const VECTOR2I& aP, int aSubpolyIndex ) const
+{
+    if( m_polys.size() == 0 ) // empty set?
+        return nullptr;
+
+    if( aSubpolyIndex >= 0 )
+    {
+        if( pointInPolygon( aP, m_polys[aSubpolyIndex][0] ) )
+            return &m_polys[aSubpolyIndex];
+        else 
+            return nullptr;
+    }
+
+    for( const POLYGON& polys : m_polys )
+    {
+        if( polys.size() == 0 )
+            continue;
+
+        if( pointInPolygon( aP, polys[0] ) )
+            return &polys;
+    }
+
+    return nullptr;
+}
+
+
 bool SHAPE_POLY_SET::pointInPolygon( const VECTOR2I& aP, const SHAPE_LINE_CHAIN& aPath ) const
 {
     int result = 0;
diff --git a/common/pcb.keywords b/common/pcb.keywords
index e8ffab2..10d1fbf 100644
--- a/common/pcb.keywords
+++ b/common/pcb.keywords
@@ -208,4 +208,5 @@ zone_45_only
 zone_clearance
 zone_connect
 zone_type
-zones
\ No newline at end of file
+zones
+stitch
diff --git a/include/geometry/shape_poly_set.h b/include/geometry/shape_poly_set.h
index 842f2de..582302b 100644
--- a/include/geometry/shape_poly_set.h
+++ b/include/geometry/shape_poly_set.h
@@ -332,6 +332,9 @@ class SHAPE_POLY_SET : public SHAPE
         ///> Returns true is a given subpolygon contains the point aP. If aSubpolyIndex < 0 (default value),
         ///> checks all polygons in the set
         bool Contains( const VECTOR2I& aP, int aSubpolyIndex = -1 ) const;
+        
+        //Acts same way as Contains, but return POLYGON if true.
+        const POLYGON* GetPolygon( const VECTOR2I& aP, int aSubpolyIndex = -1 ) const;
 
         ///> Returns true if the set is empty (no polygons at all)
         bool IsEmpty() const
diff --git a/include/layers_id_colors_and_visibility.h b/include/layers_id_colors_and_visibility.h
index 3ac8c90..d171913 100644
--- a/include/layers_id_colors_and_visibility.h
+++ b/include/layers_id_colors_and_visibility.h
@@ -514,6 +514,9 @@ enum NETNAMES_VISIBLE
     PAD_FR_NETNAMES_VISIBLE = B_Cu+1,
     PAD_BK_NETNAMES_VISIBLE,
     PADS_NETNAMES_VISIBLE,
+    
+    VIA_THROUGH_NETNAMES_VISIBLE, //stitch vias
+    VIA_BBLIND_NETNAMES_VISIBLE, //stitch vias
 
     END_NETNAMES_VISIBLE_LIST   // sentinel
 };
@@ -677,6 +680,10 @@ inline int GetNetnameLayer( int aLayer )
         return NETNAMES_GAL_LAYER( PAD_FR_NETNAMES_VISIBLE );
     else if( aLayer == ITEM_GAL_LAYER( PAD_BK_VISIBLE ) )
         return NETNAMES_GAL_LAYER( PAD_BK_NETNAMES_VISIBLE );
+    else if( aLayer == ITEM_GAL_LAYER( VIA_THROUGH_VISIBLE ) ) //sv
+        return NETNAMES_GAL_LAYER( VIA_THROUGH_NETNAMES_VISIBLE ); //sv
+    else if( aLayer == ITEM_GAL_LAYER( VIA_BBLIND_VISIBLE ) ) //sv
+        return NETNAMES_GAL_LAYER( VIA_BBLIND_NETNAMES_VISIBLE ); //sv
 
     // Fallback
     return Cmts_User;
diff --git a/pcbnew/CMakeLists.txt b/pcbnew/CMakeLists.txt
index 040f8e9..88563c6 100644
--- a/pcbnew/CMakeLists.txt
+++ b/pcbnew/CMakeLists.txt
@@ -263,6 +263,7 @@ set( PCBNEW_CLASS_SRCS
     tracepcb.cpp
     tr_modif.cpp
     undo_redo.cpp
+    viastitching.cpp
     xchgmod.cpp
     zones_convert_brd_items_to_polygons_with_Boost.cpp
     zones_convert_to_polygons_aux_functions.cpp
diff --git a/pcbnew/class_drc_item.cpp b/pcbnew/class_drc_item.cpp
index cf92901..3c249e0 100644
--- a/pcbnew/class_drc_item.cpp
+++ b/pcbnew/class_drc_item.cpp
@@ -126,6 +126,12 @@ wxString DRC_ITEM::GetErrorText() const
     case DRCE_PAD_INSIDE_TEXT:
         return wxString( _( "Pad inside a text" ) );
 
+    case DRCE_STITCH_VIA_UNCONNECTED:
+        return wxString( _( "Stitch Via unconnected" ) );
+        
+    case DRCE_STITCH_VIA_CONNECTED_POURS:
+        return wxString( _( "Stitch Via Connected Pours < 2" ) );
+
     default:
         return wxString::Format( wxT( "Unknown DRC error code %d" ), m_ErrorCode );
     }
diff --git a/pcbnew/class_pcb_layer_widget.cpp b/pcbnew/class_pcb_layer_widget.cpp
index 6faef76..cf59df2 100644
--- a/pcbnew/class_pcb_layer_widget.cpp
+++ b/pcbnew/class_pcb_layer_widget.cpp
@@ -502,8 +502,17 @@ void PCB_LAYER_WIDGET::OnLayerVisible( int aLayer, bool isVisible, bool isFinal
     EDA_DRAW_PANEL_GAL* galCanvas = myframe->GetGalCanvas();
 
     if( galCanvas )
+    {
         galCanvas->GetView()->SetLayerVisible( aLayer, isVisible );
 
+        //Update stitch vias netnames.
+        for( TRACK* track = brd->m_Track; track; track = track->Next() )
+        {
+            if( track->Type() == PCB_VIA_T )
+                galCanvas->GetView()->Update( track, KIGFX::GEOMETRY );
+        }
+    }
+
     if( isFinal )
         myframe->GetCanvas()->Refresh();
 }
diff --git a/pcbnew/class_track.cpp b/pcbnew/class_track.cpp
index 27a622f..cd0990c 100644
--- a/pcbnew/class_track.cpp
+++ b/pcbnew/class_track.cpp
@@ -155,6 +155,11 @@ VIA::VIA( BOARD_ITEM* aParent ) :
     SetViaType( VIA_THROUGH );
     m_BottomLayer = B_Cu;
     SetDrillDefault();
+    
+    //Via Stitching.
+    m_stitch = 0; 
+    m_zones.clear();
+    m_polys_zones.clear();
 }
 
 
@@ -184,7 +189,9 @@ wxString VIA::GetSelectMenuText() const
         break;
     }
 
-
+    if( m_stitch )
+        format.Prepend( _("Stitch ") );
+        
     if( board )
     {
         wxString netname = GetNetname();
@@ -992,6 +999,7 @@ void VIA::ViewGetLayers( int aLayers[], int& aCount ) const
     {
     case VIA_THROUGH:
         aLayers[1] = ITEM_GAL_LAYER( VIA_THROUGH_VISIBLE );
+        aLayers[aCount++] = NETNAMES_GAL_LAYER( VIA_THROUGH_NETNAMES_VISIBLE );
         break;
 
     case VIA_BLIND_BURIED:
@@ -999,6 +1007,7 @@ void VIA::ViewGetLayers( int aLayers[], int& aCount ) const
         aLayers[2] = m_Layer;
         aLayers[3] = m_BottomLayer;
         aCount += 2;
+        aLayers[aCount++] = NETNAMES_GAL_LAYER( VIA_BBLIND_NETNAMES_VISIBLE );
         break;
 
     case VIA_MICROVIA:
@@ -1201,6 +1210,9 @@ void VIA::GetMsgPanelInfoBase( std::vector< MSG_PANEL_ITEM >& aList )
         break;
     }
 
+    if( m_stitch )
+        msg.Prepend( _("Stitch ") );
+        
     aList.push_back( MSG_PANEL_ITEM( _( "Type" ), msg, DARKCYAN ) );
 
     GetMsgPanelInfoBase_Common( aList );
diff --git a/pcbnew/class_track.h b/pcbnew/class_track.h
index e185179..c60926e 100644
--- a/pcbnew/class_track.h
+++ b/pcbnew/class_track.h
@@ -36,6 +36,8 @@
 #include <class_board_connected_item.h>
 #include <PolyLine.h>
 #include <trigo.h>
+#include <class_zone.h>
+#include <unordered_map>
 
 
 class TRACK;
@@ -442,6 +444,23 @@ public:
     VIATYPE_T GetViaType() const          { return m_ViaType; }
     void SetViaType( VIATYPE_T aViaType ) { m_ViaType = aViaType; }
 
+    //Via Stitching.
+    int GetStitchCode( void ) const { return m_stitch; }
+    void SetStitchCode( const int aStitchCode ) { m_stitch = aStitchCode; }
+
+    std::vector<ZONE_CONTAINER*>* GetStitchZones( void ) { 
+        return &m_zones;
+    }
+    void SetStitchZones( std::vector<ZONE_CONTAINER*>& aZones ) { 
+        m_zones.swap(aZones);
+    }
+    std::unordered_map<const SHAPE_POLY_SET::POLYGON*, ZONE_CONTAINER*>* GetStitchPolysZones( void ) {
+        return &m_polys_zones; 
+    }
+    void SetStitchPolysZones( std::unordered_map<const SHAPE_POLY_SET::POLYGON*, ZONE_CONTAINER*>& aPolyZone ) {
+        m_polys_zones.swap( aPolyZone ); 
+    }
+    
     /**
      * Function SetDrill
      * sets the drill value for vias.
@@ -486,6 +505,10 @@ private:
     VIATYPE_T m_ViaType;        // Type of via
 
     int       m_Drill;          // for vias: via drill (- 1 for default value)
+    
+    int       m_stitch{0};                                      // Stitch via netcode.
+    std::vector<ZONE_CONTAINER*> m_zones;                       // Stitch via zones.
+    std::unordered_map<const SHAPE_POLY_SET::POLYGON*, ZONE_CONTAINER*> m_polys_zones;   // Stitch via zones poly in via pos.
 };
 
 
diff --git a/pcbnew/clean.cpp b/pcbnew/clean.cpp
index cd75aec..ca5de25 100644
--- a/pcbnew/clean.cpp
+++ b/pcbnew/clean.cpp
@@ -40,6 +40,7 @@
 #include <board_commit.h>
 
 #include <tuple>
+#include "viastitching.h"
 
 // Helper class used to clean tracks and vias
 class TRACKS_CLEANER: CONNECTIONS
@@ -139,8 +140,13 @@ void PCB_EDIT_FRAME::Clean_Pcb()
     wxBusyCursor( dummy );
     BOARD_COMMIT commit( this );
     TRACKS_CLEANER cleaner( GetBoard(), commit );
+    bool modified = false;
+    
+    //Via Stitching.
+    modified |= ViaStitching::CleanStitchVias( this, &commit );
+    Fill_All_Zones( this, false );
 
-    bool modified = cleaner.CleanupBoard( dlg.m_deleteShortCircuits, dlg.m_cleanVias,
+    modified |= cleaner.CleanupBoard( dlg.m_deleteShortCircuits, dlg.m_cleanVias,
                             dlg.m_mergeSegments, dlg.m_deleteUnconnectedSegm );
 
     if( modified )
@@ -288,6 +294,13 @@ bool TRACKS_CLEANER::removeBadTrackSegments()
     {
         segment->SetState( FLAG0, false );
 
+        //Via Stitching. Do not remove stitch via.
+        if( dynamic_cast<const VIA*>( segment ) )
+        {
+            if( dynamic_cast<const VIA*>( segment )->GetStitchCode() && segment->GetNetCode() )
+                continue;
+        }
+                
         for( unsigned ii = 0; ii < segment->m_PadsConnected.size(); ++ii )
         {
             if( segment->GetNetCode() != segment->m_PadsConnected[ii]->GetNetCode() )
@@ -374,6 +387,11 @@ bool TRACKS_CLEANER::clean_vias()
         {
             modified |= remove_duplicates_of_via( via );
 
+            //Via Stitching. Do not remove stitch via with netcode.
+            if( via->GetStitchCode() )
+                if( via->GetNetCode() || const_cast<VIA*>(via)->GetStitchZones()->size() )
+                    continue;
+                
             /* To delete through Via on THT pads at same location
              * Examine the list of connected pads:
              * if one through pad is found, the via can be removed */
@@ -482,6 +500,14 @@ bool TRACKS_CLEANER::deleteDanglingTracks()
         {
             next_track = track->Next();
 
+            //Via Stitching. Do not remove stitch via.
+            if( dynamic_cast<const VIA*>( track ) )
+            {
+                if( dynamic_cast<const VIA*>( track )->GetStitchCode() 
+                    && const_cast<VIA*>( dynamic_cast<const VIA*>( track ) )->GetStitchZones()->size() ) 
+                    continue;
+            }
+            
             bool flag_erase = false; // Start without a good reason to erase it
 
             /* if a track endpoint is not connected to a pad, test if
diff --git a/pcbnew/connect.cpp b/pcbnew/connect.cpp
index 99e6eb9..54c2df8 100644
--- a/pcbnew/connect.cpp
+++ b/pcbnew/connect.cpp
@@ -38,6 +38,7 @@
 
 // Helper classes to handle connection points
 #include <connect.h>
+#include "viastitching.h"
 
 extern void Merge_SubNets_Connected_By_CopperAreas( BOARD* aPcb );
 extern void Merge_SubNets_Connected_By_CopperAreas( BOARD* aPcb, int aNetcode );
@@ -861,9 +862,18 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
     // Build the net info list
     GetBoard()->BuildListOfNets();
 
+    // Via Stitching. Temp container.
+    std::unordered_map<const VIA*, int> collected_vias;
+    collected_vias.clear();
+
     // Reset variables and flags used in computation
     for( TRACK* t = m_Pcb->m_Track;  t;  t = t->Next() )
     {
+        // Via Stitching. Collect Vias.
+         const VIA* via = dynamic_cast<const VIA*>( t );
+         if( via  )
+            collected_vias.insert( std::pair<const VIA*, int> ( via, t->GetNetCode() ) );
+         
         t->m_TracksConnected.clear();
         t->m_PadsConnected.clear();
         t->start = NULL;
@@ -943,6 +953,9 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
         }
     }
 
+    //Via Stitching. Set net code to stitch vias.
+    ViaStitching::SetStitchViasNetcodes( m_Pcb, collected_vias );
+
     if( IsGalCanvasActive() )
     {
     /// @todo LEGACY tracks might have changed their nets, so we need to refresh labels in GAL
diff --git a/pcbnew/drc.cpp b/pcbnew/drc.cpp
index bdc14b7..0961e6b 100644
--- a/pcbnew/drc.cpp
+++ b/pcbnew/drc.cpp
@@ -52,6 +52,7 @@
 
 #include <dialog_drc.h>
 #include <wx/progdlg.h>
+#include "viastitching.h"
 
 
 void DRC::ShowDRCDialog( wxWindow* aParent )
@@ -230,15 +231,6 @@ void DRC::RunTests( wxTextCtrl* aMessages )
         testPad2Pad();
     }
 
-    // test track and via clearances to other tracks, pads, and vias
-    if( aMessages )
-    {
-        aMessages->AppendText( _( "Track clearances...\n" ) );
-        wxSafeYield();
-    }
-
-    testTracks( aMessages ? aMessages->GetParent() : m_pcbEditorFrame, true );
-
     // Before testing segments and unconnected, refill all zones:
     // this is a good caution, because filled areas can be outdated.
     if( aMessages )
@@ -259,6 +251,15 @@ void DRC::RunTests( wxTextCtrl* aMessages )
 
     testZones();
 
+    // test track and via clearances to other tracks, pads, and vias
+    if( aMessages )
+    {
+        aMessages->AppendText( _( "Track clearances...\n" ) );
+        wxSafeYield();
+    }
+
+    testTracks( aMessages ? aMessages->GetParent() : m_pcbEditorFrame, true );
+
     // find and gather unconnected pads.
     if( m_doUnconnectedTest )
     {
@@ -544,6 +545,9 @@ void DRC::testTracks( wxWindow *aActiveWindow, bool aShowProgressBar )
             m_pcbEditorFrame->GetGalCanvas()->GetView()->Add( m_currentMarker );
             m_currentMarker = 0;
         }
+        
+        //Via Stitching. Test Stitch via.
+        ViaStitching::RuleCheck( segm, this );
     }
 
     if( progressDialog )
diff --git a/pcbnew/drc_marker_functions.cpp b/pcbnew/drc_marker_functions.cpp
index 5642361..1547e08 100644
--- a/pcbnew/drc_marker_functions.cpp
+++ b/pcbnew/drc_marker_functions.cpp
@@ -44,6 +44,9 @@
 #include <class_zone.h>
 #include <class_marker_pcb.h>
 #include <class_pcb_text.h>
+#include <class_board.h>
+#include <wxPcbStruct.h>
+#include <view/view.h>
 
 
 MARKER_PCB* DRC::fillMarker( const TRACK* aTrack, BOARD_ITEM* aItem, int aErrorCode,
@@ -224,3 +227,27 @@ MARKER_PCB* DRC::fillMarker( int aErrorCode, const wxString& aMessage, MARKER_PC
     return fillMe;
 }
 
+void DRC::AddMarker( const BOARD_CONNECTED_ITEM* aItem, const wxPoint aMarkerPos, const int aErrorCode, MARKER_PCB* aFillMarker )
+{
+    if( aItem )
+    {
+        if( aFillMarker )
+            aFillMarker ->SetData( aErrorCode, aMarkerPos, aItem->GetSelectMenuText(), aItem->GetPosition() );
+        else
+        {
+            aFillMarker = new MARKER_PCB( aErrorCode, aMarkerPos, aItem->GetSelectMenuText(), aItem->GetPosition() );
+            aFillMarker->SetItem( aItem );
+        }
+
+        if( aFillMarker )
+        {
+            wxASSERT( aFillMarker );
+            m_pcb->Add( aFillMarker );
+            m_pcbEditorFrame->GetGalCanvas()->GetView()->Add( static_cast<BOARD_ITEM*>( aFillMarker ) );
+            aFillMarker = 0;
+        }
+    }
+}
+
+
+
diff --git a/pcbnew/drc_stuff.h b/pcbnew/drc_stuff.h
index 2546829..7f990c4 100644
--- a/pcbnew/drc_stuff.h
+++ b/pcbnew/drc_stuff.h
@@ -31,6 +31,7 @@
 
 #include <vector>
 #include <memory>
+#include <wxBasePcbFrame.h>
 
 #define OK_DRC  0
 #define BAD_DRC 1
@@ -80,6 +81,8 @@
 #define DRCE_VIA_INSIDE_TEXT                   41   ///< Via in inside a text area
 #define DRCE_TRACK_INSIDE_TEXT                 42   ///< Track in inside a text area
 #define DRCE_PAD_INSIDE_TEXT                   43   ///< Pad in inside a text area
+#define DRCE_STITCH_VIA_UNCONNECTED            44   ///< Stitch Via unconnected
+#define DRCE_STITCH_VIA_CONNECTED_POURS        45   ///< Stitch Via too less zones connected
 
 
 class EDA_DRAW_PANEL;
@@ -510,6 +513,7 @@ public:
         return m_currentMarker;
     }
 
+    void AddMarker( const BOARD_CONNECTED_ITEM* aItem, const wxPoint aMarkerPos, const int aErrorCode, MARKER_PCB* aFillMarker );
 };
 
 
diff --git a/pcbnew/edit.cpp b/pcbnew/edit.cpp
index 12ebcb3..c6d01d3 100644
--- a/pcbnew/edit.cpp
+++ b/pcbnew/edit.cpp
@@ -59,6 +59,7 @@
 
 #include <tool/tool_manager.h>
 #include <tools/common_actions.h>
+#include "viastitching.h"
 
 // Handles the selection of command events.
 void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
@@ -117,6 +118,8 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
     case ID_POPUP_PCB_PLACE_DRAGGED_ZONE_OUTLINE_SEGMENT:
     case ID_POPUP_PCB_MOVE_ZONE_OUTLINES:
     case ID_POPUP_PCB_ADD_ZONE_CORNER:
+    case ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA:
+    case ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA:
     case ID_POPUP_PCB_DELETE_TRACKSEG:
     case ID_POPUP_PCB_DELETE_TRACK:
     case ID_POPUP_PCB_DELETE_TRACKNET:
@@ -678,6 +681,12 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
         m_canvas->Refresh();
         break;
 
+    //Via Stitching.
+    case ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA:
+    case ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA:
+        ViaStitching::AddStitchVia( this, id, &dc); 
+        break;
+        
     case ID_POPUP_PCB_MOVE_TEXTEPCB_REQUEST:
         StartMoveTextePcb( (TEXTE_PCB*) GetCurItem(), &dc );
         m_canvas->SetAutoPanRequest( true );
diff --git a/pcbnew/hotkeys_board_editor.cpp b/pcbnew/hotkeys_board_editor.cpp
index 516388d..2e9f328 100644
--- a/pcbnew/hotkeys_board_editor.cpp
+++ b/pcbnew/hotkeys_board_editor.cpp
@@ -372,9 +372,13 @@ bool PCB_EDIT_FRAME::OnHotKey( wxDC* aDC, int aHotkeyCode, const wxPoint& aPosit
 
         if( !itemCurrentlyEdited ) // no track in progress: switch layer only
         {
-            Other_Layer_Route( NULL, aDC );
-            if( displ_opts->m_ContrastModeDisplay )
-                m_canvas->Refresh();
+            //Add stitch via instead layer switching.
+            if( GetToolId() == ID_TRACK_BUTT )
+            {
+                evt_type = hk_id == HK_ADD_BLIND_BURIED_VIA ?
+                ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA : ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA;
+                break;
+            }
             break;
         }
 
@@ -1071,6 +1075,7 @@ bool PCB_EDIT_FRAME::OnHotkeyDuplicateOrArrayItem( int aIdCommand )
     case PCB_LINE_T:
     case PCB_TEXT_T:
     case PCB_TRACE_T:
+    case PCB_VIA_T:
     case PCB_ZONE_AREA_T:
     case PCB_TARGET_T:
     case PCB_DIMENSION_T:
diff --git a/pcbnew/kicad_plugin.cpp b/pcbnew/kicad_plugin.cpp
index 8df1655..06776a8 100644
--- a/pcbnew/kicad_plugin.cpp
+++ b/pcbnew/kicad_plugin.cpp
@@ -1450,6 +1450,9 @@ void PCB_IO::format( TRACK* aTrack, int aNestLevel ) const
             THROW_IO_ERROR( wxString::Format( _( "unknown via type %d"  ), via->GetViaType() ) );
         }
 
+        if( via->GetStitchCode() )
+            m_out->Print( 0, " stitch" );
+            
         m_out->Print( 0, " (at %s) (size %s)",
                       FMT_IU( aTrack->GetStart() ).c_str(),
                       FMT_IU( aTrack->GetWidth() ).c_str() );
diff --git a/pcbnew/onrightclick.cpp b/pcbnew/onrightclick.cpp
index f5ed5d0..692f37d 100644
--- a/pcbnew/onrightclick.cpp
+++ b/pcbnew/onrightclick.cpp
@@ -398,6 +398,18 @@ bool PCB_EDIT_FRAME::OnRightClick( const wxPoint& aMousePos, wxMenu* aPopMenu )
                          _( "Select Working Layer" ), KiBitmap( select_w_layer_xpm ) );
             AddMenuItem( aPopMenu, ID_POPUP_PCB_SELECT_LAYER_PAIR,
                          _( "Select Layer Pair for Vias" ), KiBitmap( select_layer_pair_xpm ) );
+
+            msg = AddHotkeyName( _( "Place Through Stitch Via" ), g_Board_Editor_Hokeys_Descr,
+                                 HK_ADD_THROUGH_VIA );
+            AddMenuItem( aPopMenu, ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA, msg, KiBitmap( via_xpm ) );
+            if( GetDesignSettings().m_BlindBuriedViaAllowed )
+            {
+                msg = AddHotkeyName( _( "Place Blind/Buried Stitch Via" ),
+                                    g_Board_Editor_Hokeys_Descr, HK_ADD_BLIND_BURIED_VIA );
+                AddMenuItem( aPopMenu, ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA, 
+                             msg, KiBitmap( via_buried_xpm ) );
+            }
+
             aPopMenu->AppendSeparator();
         }
         break;
@@ -635,6 +647,12 @@ void PCB_EDIT_FRAME::createPopupMenuForTracks( TRACK* Track, wxMenu* PopMenu )
     AddMenuItem( PopMenu, Append_Track_Width_List( GetBoard() ), ID_POPUP_PCB_SELECT_WIDTH,
                  _( "Select Track Width" ), KiBitmap( width_track_xpm ) );
 
+    if( !flags && (Track->Type() == PCB_VIA_T) )
+    {
+        msg = AddHotkeyName( _("Create Via Array" ), g_Board_Editor_Hokeys_Descr, HK_CREATE_ARRAY );
+        AddMenuItem( PopMenu, ID_POPUP_PCB_CREATE_ARRAY, msg, KiBitmap( via_xpm ) );
+    }
+    
     // Delete control:
     PopMenu->AppendSeparator();
     wxMenu* trackdel_mnu = new wxMenu;
diff --git a/pcbnew/pcb_draw_panel_gal.cpp b/pcbnew/pcb_draw_panel_gal.cpp
index 55c1bd7..48c1e49 100644
--- a/pcbnew/pcb_draw_panel_gal.cpp
+++ b/pcbnew/pcb_draw_panel_gal.cpp
@@ -50,6 +50,7 @@ const LAYER_NUM GAL_LAYER_ORDER[] =
     ITEM_GAL_LAYER( MOD_REFERENCES_VISIBLE), ITEM_GAL_LAYER( MOD_VALUES_VISIBLE ),
 
     ITEM_GAL_LAYER( RATSNEST_VISIBLE ), ITEM_GAL_LAYER( ANCHOR_VISIBLE ),
+    NETNAMES_GAL_LAYER( VIA_THROUGH_NETNAMES_VISIBLE ), NETNAMES_GAL_LAYER( VIA_BBLIND_NETNAMES_VISIBLE ), 
     ITEM_GAL_LAYER( VIAS_HOLES_VISIBLE ), ITEM_GAL_LAYER( PADS_HOLES_VISIBLE ),
     ITEM_GAL_LAYER( VIA_THROUGH_VISIBLE ), ITEM_GAL_LAYER( VIA_BBLIND_VISIBLE ),
     ITEM_GAL_LAYER( VIA_MICROVIA_VISIBLE ), ITEM_GAL_LAYER( PADS_VISIBLE ),
@@ -209,6 +210,7 @@ void PCB_DRAW_PANEL_GAL::SetHighContrastLayer( LAYER_ID aLayer )
                 GetNetnameLayer( aLayer ), ITEM_GAL_LAYER( VIA_THROUGH_VISIBLE ),
                 ITEM_GAL_LAYER( VIAS_HOLES_VISIBLE ), ITEM_GAL_LAYER( PADS_VISIBLE ),
                 ITEM_GAL_LAYER( PADS_HOLES_VISIBLE ), NETNAMES_GAL_LAYER( PADS_NETNAMES_VISIBLE ),
+                NETNAMES_GAL_LAYER( VIA_THROUGH_NETNAMES_VISIBLE ), NETNAMES_GAL_LAYER( VIA_BBLIND_NETNAMES_VISIBLE ),
                 ITEM_GAL_LAYER( GP_OVERLAY ), ITEM_GAL_LAYER( RATSNEST_VISIBLE )
         };
 
@@ -242,7 +244,8 @@ void PCB_DRAW_PANEL_GAL::SetTopLayer( LAYER_ID aLayer )
 
     // Layers that should always have on-top attribute enabled
     const LAYER_NUM layers[] = {
-            ITEM_GAL_LAYER( VIA_THROUGH_VISIBLE ),
+            ITEM_GAL_LAYER( VIA_THROUGH_VISIBLE ), NETNAMES_GAL_LAYER( VIA_THROUGH_NETNAMES_VISIBLE ),
+            ITEM_GAL_LAYER( VIA_BBLIND_VISIBLE ), NETNAMES_GAL_LAYER( VIA_BBLIND_NETNAMES_VISIBLE ),
             ITEM_GAL_LAYER( VIAS_HOLES_VISIBLE ), ITEM_GAL_LAYER( PADS_VISIBLE ),
             ITEM_GAL_LAYER( PADS_HOLES_VISIBLE ), NETNAMES_GAL_LAYER( PADS_NETNAMES_VISIBLE ),
             ITEM_GAL_LAYER( GP_OVERLAY ), ITEM_GAL_LAYER( RATSNEST_VISIBLE ), Dwgs_User,
@@ -420,6 +423,8 @@ void PCB_DRAW_PANEL_GAL::setDefaultLayerDeps()
 
     // Some more required layers settings
     m_view->SetRequired( ITEM_GAL_LAYER( VIAS_HOLES_VISIBLE ), ITEM_GAL_LAYER( VIA_THROUGH_VISIBLE ) );
+    m_view->SetRequired( NETNAMES_GAL_LAYER( VIA_THROUGH_NETNAMES_VISIBLE ), ITEM_GAL_LAYER( VIA_THROUGH_VISIBLE ) );
+    m_view->SetRequired( NETNAMES_GAL_LAYER( VIA_BBLIND_NETNAMES_VISIBLE ), ITEM_GAL_LAYER( VIA_BBLIND_VISIBLE ) );
     m_view->SetRequired( ITEM_GAL_LAYER( PADS_HOLES_VISIBLE ), ITEM_GAL_LAYER( PADS_VISIBLE ) );
     m_view->SetRequired( NETNAMES_GAL_LAYER( PADS_NETNAMES_VISIBLE ), ITEM_GAL_LAYER( PADS_VISIBLE ) );
 
diff --git a/pcbnew/pcb_painter.cpp b/pcbnew/pcb_painter.cpp
index 7515bcd..154e7ce 100644
--- a/pcbnew/pcb_painter.cpp
+++ b/pcbnew/pcb_painter.cpp
@@ -82,6 +82,8 @@ void PCB_RENDER_SETTINGS::ImportLegacyColors( const COLORS_DESIGN_SETTINGS* aSet
     m_layerColors[ITEM_GAL_LAYER( VIA_BBLIND_VISIBLE )]             = COLOR4D( 0.6, 0.6, 0.6, 0.8 );
     m_layerColors[ITEM_GAL_LAYER( VIA_MICROVIA_VISIBLE )]           = COLOR4D( 0.4, 0.4, 0.8, 0.8 );
     m_layerColors[ITEM_GAL_LAYER( PADS_VISIBLE )]                   = COLOR4D( 0.6, 0.6, 0.6, 0.8 );
+    m_layerColors[NETNAMES_GAL_LAYER( VIA_THROUGH_NETNAMES_VISIBLE )]= COLOR4D( 1.0, 1.0, 1.0, 0.9 );
+    m_layerColors[NETNAMES_GAL_LAYER( VIA_BBLIND_NETNAMES_VISIBLE )]= COLOR4D( 1.0, 1.0, 1.0, 0.9 );
     m_layerColors[NETNAMES_GAL_LAYER( PADS_NETNAMES_VISIBLE )]      = COLOR4D( 1.0, 1.0, 1.0, 0.9 );
     m_layerColors[NETNAMES_GAL_LAYER( PAD_FR_NETNAMES_VISIBLE )]    = COLOR4D( 1.0, 1.0, 1.0, 0.9 );
     m_layerColors[NETNAMES_GAL_LAYER( PAD_BK_NETNAMES_VISIBLE )]    = COLOR4D( 1.0, 1.0, 1.0, 0.9 );
@@ -350,6 +352,32 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
     if( !( brd->GetVisibleLayers() & aVia->GetLayerSet() ).any() )
         return;
 
+    if( IsNetnameLayer( aLayer ) )
+    {
+        if( aVia->GetStitchCode() && m_pcbSettings.m_netNamesOnTracks && aVia->GetNetCode() )
+        {
+            const wxString& netName = aVia->GetShortNetname();
+            VECTOR2D textPosition = aVia->GetEnd();
+            double textOrientation = 0.0;
+
+            double tsize = aVia->GetDrillValue() / netName.Length();
+            VECTOR2D namesize( tsize, tsize );
+
+            m_gal->SetIsStroke( true );
+            m_gal->SetIsFill( false );
+            m_gal->SetStrokeColor( m_pcbSettings.GetColor( NULL, aLayer ) );
+            m_gal->SetLineWidth( namesize.x / 12.0 );
+            m_gal->SetFontBold( false );
+            m_gal->SetFontItalic( false );
+            m_gal->SetTextMirrored( false );
+            m_gal->SetGlyphSize( namesize );
+            m_gal->SetHorizontalJustify( GR_TEXT_HJUSTIFY_CENTER );
+            m_gal->SetVerticalJustify( GR_TEXT_VJUSTIFY_CENTER );
+            m_gal->BitmapText( netName, textPosition, textOrientation );
+        }
+        return;
+    }
+
     // Choose drawing settings depending on if we are drawing via's pad or hole
     if( aLayer == ITEM_GAL_LAYER( VIAS_HOLES_VISIBLE ) )
         radius = aVia->GetDrillValue() / 2.0;
@@ -378,47 +406,82 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
         break;
     }
 
+    m_gal->SetIsFill( !sketchMode );
+    m_gal->SetIsStroke( sketchMode );
+    
     if( aVia->GetViaType() == VIA_BLIND_BURIED )
     {
         LAYER_ID layerTop, layerBottom;
         aVia->LayerPair( &layerTop, &layerBottom );
 
         if( aLayer == ITEM_GAL_LAYER( VIAS_HOLES_VISIBLE ) )
-        {                                                               // TODO outline mode
-            m_gal->SetIsFill( true );
-            m_gal->SetIsStroke( false );
-            m_gal->SetFillColor( color );
+        {                         
+            if( sketchMode ) //Outline mode
+            {
+                m_gal->SetLineWidth( m_pcbSettings.m_outlineWidth );
+                m_gal->SetStrokeColor( color );
+            }
+            else //Filled mode
+            {
+                m_gal->SetFillColor( color );
+            }
             m_gal->DrawCircle( center, radius );
         }
         else
         {
-            double width = ( aVia->GetWidth() - aVia->GetDrillValue() ) / 2.0;
-
-            m_gal->SetLineWidth( width );
-            m_gal->SetIsFill( true );
-            m_gal->SetIsStroke( false );
-            m_gal->SetFillColor( color );
-
-            if( aLayer == layerTop )
+            if( sketchMode ) //Outline mode
             {
-                m_gal->DrawArc( center, radius, 0.0, M_PI / 2.0 );
+                m_gal->SetLineWidth( m_pcbSettings.m_outlineWidth );
+                m_gal->SetStrokeColor( color );
+                if( aLayer == layerTop )
+                {
+                    m_gal->DrawArc( center, radius, 0.0, M_PI_2 );
+                    m_gal->DrawLine( center, center + VECTOR2D( radius, 0.0 ) );
+                    m_gal->DrawLine( center, center + VECTOR2D( 0.0, radius ) );
+                }
+                else if( aLayer == layerBottom )
+                {
+                    m_gal->DrawArc( center, radius, M_PI, M_PI_2_x3 );
+                    m_gal->DrawLine( center, center + VECTOR2D( -radius, 0.0 ) );
+                    m_gal->DrawLine( center, center + VECTOR2D( 0.0, -radius ) );
+                }
+                else if( aLayer == ITEM_GAL_LAYER( VIA_BBLIND_VISIBLE ) )
+                {
+                    m_gal->DrawArc( center, radius, M_PI_2, M_PI );
+                    m_gal->DrawArc( center, radius, M_PI_2_x3, M_PI_x2 );
+                    double r1 = aVia->GetDrillValue() / 2.0;
+                    m_gal->DrawLine( center + VECTOR2D( r1, 0.0 ), center + VECTOR2D( radius, 0.0 ) );
+                    m_gal->DrawLine( center + VECTOR2D( 0.0, r1 ), center + VECTOR2D( 0.0, radius ) );
+                    m_gal->DrawLine( center + VECTOR2D( -r1, 0.0 ), center + VECTOR2D( -radius, 0.0 ) );
+                    m_gal->DrawLine( center + VECTOR2D( 0.0, -r1 ), center + VECTOR2D( 0.0, -radius ) );
+                }
             }
-            else if( aLayer == layerBottom )
+            else //Filled mode
             {
-                m_gal->DrawArc( center, radius, M_PI, 3.0 * M_PI / 2.0 );
-            }
-            else if( aLayer == ITEM_GAL_LAYER( VIA_BBLIND_VISIBLE ) )
-            {
-                m_gal->DrawArc( center, radius, M_PI / 2.0, M_PI );
-                m_gal->DrawArc( center, radius, 3.0 * M_PI / 2.0, 2.0 * M_PI );
+                //double width = ( aVia->GetWidth() - aVia->GetDrillValue() ) / 2.0;
+
+                //m_gal->SetLineWidth( width );
+                m_gal->SetFillColor( color );
+
+                if( aLayer == layerTop )
+                {
+                    m_gal->DrawArc( center, radius, 0.0, M_PI_2 );
+                }
+                else if( aLayer == layerBottom )
+                {
+                    m_gal->DrawArc( center, radius, M_PI, M_PI_2_x3 );
+                }
+                else if( aLayer == ITEM_GAL_LAYER( VIA_BBLIND_VISIBLE ) )
+                {
+                    m_gal->DrawArc( center, radius, M_PI_2, M_PI );
+                    m_gal->DrawArc( center, radius, M_PI_2_x3, M_PI_x2);
+                }
+                m_gal->DrawCircle( center, aVia->GetDrillValue() / 2.0 );
             }
         }
     }
     else
     {
-        m_gal->SetIsFill( !sketchMode );
-        m_gal->SetIsStroke( sketchMode );
-
         if( sketchMode )
         {
             // Outline mode
@@ -629,8 +692,8 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
             if( m_pcbSettings.m_sketchMode[ITEM_GAL_LAYER( PADS_VISIBLE )] )
             {
                 // Outline mode
-                m_gal->DrawArc( VECTOR2D( -m, 0 ), n, M_PI / 2, 3 * M_PI / 2 );
-                m_gal->DrawArc( VECTOR2D( m, 0 ),  n, M_PI / 2, -M_PI / 2 );
+                m_gal->DrawArc( VECTOR2D( -m, 0 ), n, M_PI_2, M_PI_2_x3 );
+                m_gal->DrawArc( VECTOR2D( m, 0 ),  n, M_PI_2, -M_PI_2 );
                 m_gal->DrawLine( VECTOR2D( -m, -n ), VECTOR2D( m, -n ) );
                 m_gal->DrawLine( VECTOR2D( -m, n ),  VECTOR2D( m, n ) );
             }
@@ -1004,7 +1067,7 @@ void PCB_PAINTER::draw( const PCB_TARGET* aTarget )
     if( aTarget->GetShape() )
     {
         // shape x
-        m_gal->Rotate( M_PI / 4.0 );
+        m_gal->Rotate( M_PI_4 );
         size   = 2.0 * aTarget->GetSize() / 3.0;
         radius = aTarget->GetSize() / 2.0;
     }
diff --git a/pcbnew/pcb_painter.h b/pcbnew/pcb_painter.h
index e658286..91fc3d0 100644
--- a/pcbnew/pcb_painter.h
+++ b/pcbnew/pcb_painter.h
@@ -214,6 +214,10 @@ protected:
     void draw( const DIMENSION* aDimension, int aLayer );
     void draw( const PCB_TARGET* aTarget );
     void draw( const MARKER_PCB* aMarker );
+
+private:
+    static constexpr double M_PI_x2 = M_PI * 2.0;
+    static constexpr double M_PI_2_x3 = M_PI_2 * 3.0; 
 };
 } // namespace KIGFX
 
diff --git a/pcbnew/pcb_parser.cpp b/pcbnew/pcb_parser.cpp
index 89460ec..a4c951c 100644
--- a/pcbnew/pcb_parser.cpp
+++ b/pcbnew/pcb_parser.cpp
@@ -2566,6 +2566,8 @@ VIA* PCB_PARSER::parseVIA() throw( IO_ERROR, PARSE_ERROR )
     wxPoint pt;
     T token;
 
+    bool is_stitch = false;
+    
     std::unique_ptr< VIA > via( new VIA( m_board ) );
 
     for( token = NextTok();  token != T_RIGHT;  token = NextTok() )
@@ -2632,11 +2634,18 @@ VIA* PCB_PARSER::parseVIA() throw( IO_ERROR, PARSE_ERROR )
             NeedRIGHT();
             break;
 
+        case T_stitch:
+            is_stitch = true;
+            break;
+
         default:
-            Expecting( "blind, micro, at, size, drill, layers, net, tstamp, or status" );
+            Expecting( "blind, micro, at, size, drill, layers, net, tstamp, stitch, or status" );
         }
     }
 
+    if( is_stitch )
+        via->SetStitchCode( via->GetNetCode() );
+    
     return via.release();
 }
 
diff --git a/pcbnew/pcbnew_id.h b/pcbnew/pcbnew_id.h
index 19614c0..e81dc78 100644
--- a/pcbnew/pcbnew_id.h
+++ b/pcbnew/pcbnew_id.h
@@ -125,6 +125,8 @@ enum pcbnew_ids
     ID_POPUP_PCB_PLACE_DRAGGED_ZONE_OUTLINE_SEGMENT,
     ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_ALL_ZONES,
     ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_CURRENT_ZONE,
+    ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA,
+    ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA,
 
     ID_POPUP_PCB_DELETE_MARKER,
 
diff --git a/pcbnew/router/pns_line_placer.cpp b/pcbnew/router/pns_line_placer.cpp
index e7c84df..c758bf8 100644
--- a/pcbnew/router/pns_line_placer.cpp
+++ b/pcbnew/router/pns_line_placer.cpp
@@ -735,6 +735,13 @@ bool LINE_PLACER::SetLayer( int aLayer )
 }
 
 
+bool LINE_PLACER::SetNetCode( int aNetCode ) 
+{
+    m_currentNet = aNetCode;
+    return true;
+}
+
+    
 bool LINE_PLACER::Start( const VECTOR2I& aP, ITEM* aStartItem )
 {
     VECTOR2I p( aP );
diff --git a/pcbnew/router/pns_line_placer.h b/pcbnew/router/pns_line_placer.h
index b29ecb2..fcfb8c2 100644
--- a/pcbnew/router/pns_line_placer.h
+++ b/pcbnew/router/pns_line_placer.h
@@ -96,6 +96,9 @@ public:
      * Sets the current routing layer.
      */
     bool SetLayer( int aLayer ) override;
+    
+    // Via Stitching for.
+    bool SetNetCode( int aNetCode ) override;
 
     /**
      * Function Head()
diff --git a/pcbnew/router/pns_placement_algo.h b/pcbnew/router/pns_placement_algo.h
index e7a9540..c3644fe 100644
--- a/pcbnew/router/pns_placement_algo.h
+++ b/pcbnew/router/pns_placement_algo.h
@@ -109,6 +109,16 @@ public:
     }
 
     /**
+     * Function SetNetCode( int aNetCode )
+     *
+     * Sets the current routing netcode.
+     */
+    virtual bool SetNetCode( int aNetCode )
+    {
+        return false;
+    }
+
+    /**
      * Function Traces()
      *
      * Returns all routed/tuned traces.
diff --git a/pcbnew/router/pns_router.h b/pcbnew/router/pns_router.h
index 5454243..e23088e 100644
--- a/pcbnew/router/pns_router.h
+++ b/pcbnew/router/pns_router.h
@@ -35,6 +35,7 @@
 #include "pns_item.h"
 #include "pns_itemset.h"
 #include "pns_node.h"
+#include "pns_placement_algo.h"
 
 namespace KIGFX
 {
@@ -157,6 +158,9 @@ public:
     }
 
     bool IsPlacingVia() const;
+    
+    //Via stitching.
+    bool SetNetCode( const int aNetCode ) { return m_placer->SetNetCode( aNetCode ); }
 
     const ITEM_SET   QueryHoverItems( const VECTOR2I& aP );
     const VECTOR2I      SnapToItem( ITEM* aItem, VECTOR2I aP, bool& aSplitsSegment );
@@ -205,7 +209,7 @@ public:
     const wxString& FailureReason() const { return m_failureReason; }
 
     PLACEMENT_ALGO* Placer() { return m_placer.get(); }
-
+    
     ROUTER_IFACE* GetInterface() const
     {
         return m_iface;
diff --git a/pcbnew/router/router_tool.cpp b/pcbnew/router/router_tool.cpp
index 144e2d1..42b3f7f 100644
--- a/pcbnew/router/router_tool.cpp
+++ b/pcbnew/router/router_tool.cpp
@@ -717,7 +717,11 @@ int ROUTER_TOOL::mainLoop( PNS::ROUTER_MODE aMode )
         }
         else if( evt->IsAction( &ACT_PlaceThroughVia ) )
         {
-            m_toolMgr->RunAction( COMMON_ACTIONS::layerToggle, true );
+            m_toolMgr->RunAction( COMMON_ACTIONS::placeStitchThroughVia, true );
+        }
+        else if( evt->IsAction( &ACT_PlaceBlindVia ) )
+        {
+            m_toolMgr->RunAction( COMMON_ACTIONS::placeStitchBlindVia, true );
         }
         else if( evt->IsAction( &COMMON_ACTIONS::remove ) )
         {
diff --git a/pcbnew/router/router_tool.h b/pcbnew/router/router_tool.h
index 5191e9f..a692bbc 100644
--- a/pcbnew/router/router_tool.h
+++ b/pcbnew/router/router_tool.h
@@ -40,6 +40,8 @@ public:
 
     int DpDimensionsDialog ( const TOOL_EVENT& aEvent );
     int SettingsDialog ( const TOOL_EVENT& aEvent );
+    
+    void AddStitchVia( const TOOL_EVENT& aEvent, const VIATYPE_T aViaType );
 
 private:
 
diff --git a/pcbnew/tools/common_actions.cpp b/pcbnew/tools/common_actions.cpp
index b9af359..6e6e3bc 100644
--- a/pcbnew/tools/common_actions.cpp
+++ b/pcbnew/tools/common_actions.cpp
@@ -304,7 +304,8 @@ TOOL_ACTION COMMON_ACTIONS::layerPrev( "pcbnew.Control.layerPrev",
         "", "" );
 
 TOOL_ACTION COMMON_ACTIONS::layerToggle( "pcbnew.Control.layerToggle",
-        AS_GLOBAL, TOOL_ACTION::LegacyHotKey( HK_ADD_THROUGH_VIA ),
+        //AS_GLOBAL, TOOL_ACTION::LegacyHotKey( HK_ADD_THROUGH_VIA ),
+        AS_GLOBAL, 0,
         "", "" );
 
 TOOL_ACTION COMMON_ACTIONS::layerAlphaInc( "pcbnew.Control.layerAlphaInc",
@@ -392,6 +393,14 @@ TOOL_ACTION COMMON_ACTIONS::zoneMerge( "pcbnew.EditorControl.zoneMerge",
         AS_GLOBAL, 0,
         _( "Merge zones" ), _( "Merge zones" ) );
 
+TOOL_ACTION COMMON_ACTIONS::placeStitchThroughVia( "pcbnew.Control.placeStitchVia",
+        AS_GLOBAL, TOOL_ACTION::LegacyHotKey( HK_ADD_THROUGH_VIA ),
+        "", "" );
+
+TOOL_ACTION COMMON_ACTIONS::placeStitchBlindVia( "pcbnew.Control.placeStitchBlindVia",
+        AS_GLOBAL, TOOL_ACTION::LegacyHotKey( HK_ADD_BLIND_BURIED_VIA ),
+        "", "" );
+
 
 TOOL_ACTION COMMON_ACTIONS::placeTarget( "pcbnew.EditorControl.placeTarget",
         AS_GLOBAL, 0,
diff --git a/pcbnew/tools/common_actions.h b/pcbnew/tools/common_actions.h
index 962b6b4..e1c261a 100644
--- a/pcbnew/tools/common_actions.h
+++ b/pcbnew/tools/common_actions.h
@@ -249,6 +249,8 @@ public:
     static TOOL_ACTION zoneUnfill;
     static TOOL_ACTION zoneUnfillAll;
     static TOOL_ACTION zoneMerge;
+    static TOOL_ACTION placeStitchThroughVia;
+    static TOOL_ACTION placeStitchBlindVia;
 
     // Module editor tools
     /// Activation of the drawing tool (placing a PAD)
diff --git a/pcbnew/tools/pcb_editor_control.cpp b/pcbnew/tools/pcb_editor_control.cpp
index 74e2761..a0b4dcf 100644
--- a/pcbnew/tools/pcb_editor_control.cpp
+++ b/pcbnew/tools/pcb_editor_control.cpp
@@ -48,6 +48,7 @@
 #include <view/view_group.h>
 #include <view/view_controls.h>
 #include <origin_viewitem.h>
+#include <router/router_tool.h>
 
 #include <functional>
 using namespace std::placeholders;
@@ -512,10 +513,13 @@ int PCB_EDITOR_CONTROL::ZoneFillAll( const TOOL_EVENT& aEvent )
     BOARD* board = getModel<BOARD>();
     RN_DATA* ratsnest = board->GetRatsnest();
 
+    //Via Stitching.
+    m_frame->Fill_All_Zones( m_frame, false );
+
     for( int i = 0; i < board->GetAreaCount(); ++i )
     {
         ZONE_CONTAINER* zone = board->GetArea( i );
-        m_frame->Fill_Zone( zone );
+        //m_frame->Fill_Zone( zone );
         zone->SetIsFilled( true );
         ratsnest->Update( zone );
         getView()->Update( zone );
@@ -674,6 +678,28 @@ int PCB_EDITOR_CONTROL::ZoneMerge( const TOOL_EVENT& aEvent )
 }
 
 
+int PCB_EDITOR_CONTROL::PlaceStitchThroughVia( const TOOL_EVENT& aEvent )
+{
+    TOOL_BASE* tool = m_toolMgr->FindTool( "pcbnew.InteractiveRouter" );
+    if( dynamic_cast<ROUTER_TOOL*>( tool ) )
+    {
+        ROUTER_TOOL* router = static_cast<ROUTER_TOOL*>( tool );
+        router->AddStitchVia( aEvent, VIA_THROUGH );
+    }
+}
+
+
+int PCB_EDITOR_CONTROL::PlaceStitchBlindVia( const TOOL_EVENT& aEvent )
+{
+    TOOL_BASE* tool = m_toolMgr->FindTool( "pcbnew.InteractiveRouter" );
+    if( dynamic_cast<ROUTER_TOOL*>( tool ) )
+    {
+        ROUTER_TOOL* router = static_cast<ROUTER_TOOL*>( tool );
+        router->AddStitchVia( aEvent, VIA_BLIND_BURIED );
+    }
+}
+
+
 int PCB_EDITOR_CONTROL::CrossProbePcbToSch( const TOOL_EVENT& aEvent )
 {
     if( m_probingSchToPcb )
@@ -840,6 +866,8 @@ void PCB_EDITOR_CONTROL::SetTransitions()
     Go( &PCB_EDITOR_CONTROL::ZoneUnfill,         COMMON_ACTIONS::zoneUnfill.MakeEvent() );
     Go( &PCB_EDITOR_CONTROL::ZoneUnfillAll,      COMMON_ACTIONS::zoneUnfillAll.MakeEvent() );
     Go( &PCB_EDITOR_CONTROL::ZoneMerge,          COMMON_ACTIONS::zoneMerge.MakeEvent() );
+    Go( &PCB_EDITOR_CONTROL::PlaceStitchThroughVia,COMMON_ACTIONS::placeStitchThroughVia.MakeEvent() );
+    Go( &PCB_EDITOR_CONTROL::PlaceStitchBlindVia,COMMON_ACTIONS::placeStitchBlindVia.MakeEvent() );
 
     // Placing tools
     Go( &PCB_EDITOR_CONTROL::PlaceTarget,        COMMON_ACTIONS::placeTarget.MakeEvent() );
diff --git a/pcbnew/tools/pcb_editor_control.h b/pcbnew/tools/pcb_editor_control.h
index bbf99e7..ba56aab 100644
--- a/pcbnew/tools/pcb_editor_control.h
+++ b/pcbnew/tools/pcb_editor_control.h
@@ -64,6 +64,8 @@ public:
     int ZoneUnfill( const TOOL_EVENT& aEvent );
     int ZoneUnfillAll( const TOOL_EVENT& aEvent );
     int ZoneMerge( const TOOL_EVENT& aEvent );
+    int PlaceStitchThroughVia( const TOOL_EVENT& aEvent );
+    int PlaceStitchBlindVia( const TOOL_EVENT& aEvent );
 
     /**
      * Function PlaceTarget()
diff --git a/pcbnew/tools/pcbnew_control.cpp b/pcbnew/tools/pcbnew_control.cpp
index c6cd77f..7da22e9 100644
--- a/pcbnew/tools/pcbnew_control.cpp
+++ b/pcbnew/tools/pcbnew_control.cpp
@@ -259,7 +259,7 @@ int PCBNEW_CONTROL::ViaDisplayMode( const TOOL_EVENT& aEvent )
 
     for( TRACK* track = getModel<BOARD>()->m_Track; track; track = track->Next() )
     {
-        if( track->Type() == PCB_TRACE_T )
+        if( track->Type() == PCB_VIA_T )
             getView()->Update( track, KIGFX::GEOMETRY );
     }
 
diff --git a/pcbnew/zones_by_polygon_fill_functions.cpp b/pcbnew/zones_by_polygon_fill_functions.cpp
index ebe2964..a936a5c 100644
--- a/pcbnew/zones_by_polygon_fill_functions.cpp
+++ b/pcbnew/zones_by_polygon_fill_functions.cpp
@@ -42,11 +42,12 @@
 
 #include <pcbnew.h>
 #include <zones.h>
+#include "viastitching.h"
 
 #include <view/view.h>
 
-#define FORMAT_STRING _( "Filling zone %d out of %d (net %s)..." )
-
+//#define FORMAT_STRING _( "Filling zone %d out of %d (net %s)..." )
+#define FORMAT_STRING _( "Filling zone %d out of %d (net %s) Pass %d/2 ..." ) //Via stitching: 
 
 /**
  * Function Delete_OldZone_Fill (obsolete)
@@ -140,7 +141,7 @@ int PCB_EDIT_FRAME::Fill_All_Zones( wxWindow * aActiveWindow, bool aVerbose )
 
     if( aActiveWindow )
         progressDialog = new wxProgressDialog( _( "Fill All Zones" ), msg,
-                                     areaCount+2, aActiveWindow,
+                                     areaCount*2+1, aActiveWindow,
                                      wxPD_AUTO_HIDE | wxPD_CAN_ABORT |
                                      wxPD_APP_MODAL | wxPD_ELAPSED_TIME );
     // Display the actual message
@@ -152,29 +153,43 @@ int PCB_EDIT_FRAME::Fill_All_Zones( wxWindow * aActiveWindow, bool aVerbose )
 
     int ii;
 
-    for( ii = 0; ii < areaCount; ii++ )
+    //Via Stitching: Set all stitch vias netcodes for recovering.
+    Compile_Ratsnest( nullptr, false );
+    
+    int progressCount = 1;
+    for(int n = 0; n < 2; n++)     //Via Stitching: Fill pours twice.
     {
-        ZONE_CONTAINER* zoneContainer = GetBoard()->GetArea( ii );
-        if( zoneContainer->GetIsKeepout() )
-            continue;
+        for( ii = 0; ii < areaCount; ii++ )
+        {
+            ZONE_CONTAINER* zoneContainer = GetBoard()->GetArea( ii );
+            if( zoneContainer->GetIsKeepout() )
+                continue;
 
-        msg.Printf( FORMAT_STRING, ii + 1, areaCount, GetChars( zoneContainer->GetNetname() ) );
+            msg.Printf( FORMAT_STRING, ii + 1, areaCount, GetChars( zoneContainer->GetNetname() ), n+1 );
 
-        if( progressDialog )
-        {
-            if( !progressDialog->Update( ii+1, msg ) )
-                break;  // Aborted by user
-        }
+            if( progressDialog )
+            {
+                if( !progressDialog->Update( progressCount++, msg ) )
+                    break;  // Aborted by user
+            }
 
-        errorLevel = Fill_Zone( zoneContainer );
+            errorLevel = Fill_Zone( zoneContainer );
 
-        if( errorLevel && !aVerbose )
-            break;
-    }
+            if( errorLevel && !aVerbose )
+                break;
+        }
+        
+        if( progressDialog )
+            progressDialog->Update( progressCount, _( "Updating stitch vias..." ) );
 
+        //Via Stitching: Recalclate vias zones connections after fill. 
+        n? ViaStitching::SetStitchViasNetcodes( GetBoard() ) : ViaStitching::ConnectStitchViasZonesPolygons( GetBoard() );
+    }
+    
     if( progressDialog )
     {
-        progressDialog->Update( ii+2, _( "Updating ratsnest..." ) );
+        //progressDialog->Update( ii+2, _( "Updating ratsnest..." ) );
+        progressDialog->Update( progressCount, _( "Updating ratsnest..." ) );
 #ifdef __WXMAC__
         // Work around a dialog z-order issue on OS X
         aActiveWindow->Raise();

--------------2.7.4--



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